This is a re-base of a patch set sent in December. The only real changes are CPUState -> CPUMIPSState. The commit message for patch 4 describe the real intent.
This patch set is also available at git://repo.or.cz/qemu/rth.git rth/mips/fpregs r~ Richard Henderson (5): target-mips: Set opn in gen_ldst_multiple. target-mips: Fix MIPS_DEBUG. target-mips: Pass DisasContext to fpr32 load/store routines target-mips: Use TCG registers for the FPU. target-mips: Add accessors for the two 32-bit halves of a 64-bit FPR target-mips/translate.c | 547 +++++++++++++++++++++++++++-------------------- 1 files changed, 318 insertions(+), 229 deletions(-) -- 1.7.7.6
