Ah, this is a duplicate effort on stage-1 translation.

Hi Clement,

We had ever sent a rfcv1 series "intel_iommu: Enable stage-1 translation"
for both emulated and passthrough device, link:
https://lists.gnu.org/archive/html/qemu-devel/2024-01/msg02740.html
which now evolves to rfcv2, link:
https://github.com/yiliu1765/qemu/commits/zhenzhong/iommufd_nesting_rfcv2/

It had addressed recent community comments, also the comments in old history 
series: 
https://patchwork.kernel.org/project/kvm/cover/20210302203827.437645-1-yi.l....@intel.com/

Would you mind rebasing your remaining part, i.e., ATS, PRI emulation, etc on 
to our rfcv2?

Thanks
Zhenzhong

>-----Original Message-----
>From: Cédric Le Goater <c...@redhat.com>
>Subject: Re: [PATCH intel_iommu 0/7] FLTS for VT-d
>
>Hello,
>
>Adding a few people in Cc: who are familiar with the Intel IOMMU.
>
>Thanks,
>
>C.
>
>
>
>
>On 4/22/24 17:52, CLEMENT MATHIEU--DRIF wrote:
>> This series is the first of a list that add support for SVM in the Intel 
>> IOMMU.
>>
>> Here, we implement support for first-stage translation in VT-d.
>> The PASID-based IOTLB invalidation is also added in this series as it is a
>> requirement of FLTS.
>>
>> The last patch introduces the 'flts' option to enable the feature from
>> the command line.
>> Once enabled, several drivers of the Linux kernel use this feature.
>>
>> This work is based on the VT-d specification version 4.1 (March 2023)
>>
>> Here is a link to a GitHub repository where you can find the following
>elements :
>>      - Qemu with all the patches for SVM
>>          - ATS
>>          - PRI
>>          - PASID based IOTLB invalidation
>>          - Device IOTLB invalidations
>>          - First-stage translations
>>          - Requests with already translated addresses
>>      - A demo device
>>      - A simple driver for the demo device
>>      - A userspace program (for testing and demonstration purposes)
>>
>> https://github.com/BullSequana/Qemu-in-guest-SVM-demo
>>
>> Clément Mathieu--Drif (7):
>>    intel_iommu: fix FRCD construction macro.
>>    intel_iommu: rename slpte to pte before adding FLTS
>>    intel_iommu: make types match
>>    intel_iommu: add support for first-stage translation
>>    intel_iommu: extract device IOTLB invalidation logic
>>    intel_iommu: add PASID-based IOTLB invalidation
>>    intel_iommu: add a CLI option to enable FLTS
>>
>>   hw/i386/intel_iommu.c          | 655 ++++++++++++++++++++++++++------
>-
>>   hw/i386/intel_iommu_internal.h | 114 ++++--
>>   include/hw/i386/intel_iommu.h  |   3 +-
>>   3 files changed, 609 insertions(+), 163 deletions(-)
>>

Reply via email to