The NMI exception trap entry behave like IRQ or FIQ which depends on the NMI interrupt type.
Signed-off-by: Jinjie Ruan <ruanjin...@huawei.com> --- target/arm/helper.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/target/arm/helper.c b/target/arm/helper.c index 952ea7c02a..ac5f998e32 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11466,6 +11466,13 @@ static void arm_cpu_do_interrupt_aarch64(CPUState *cs) case EXCP_VFIQ: addr += 0x100; break; + case EXCP_NMI: + if (env->nmi_is_irq) { + addr += 0x80; + } else { + addr += 0x100; + } + break; case EXCP_VSERR: addr += 0x180; /* Construct the SError syndrome from IDS and ISS fields. */ -- 2.34.1