在 2024/2/9 09:05, Philippe Mathieu-Daudé 写道:
Alternative to: https://lore.kernel.org/qemu-devel/20240209085347.8446-1-phi...@linaro.org/ If the I6500 can not be tested or its support is incomplete, there is no point in wasting energy maintaining it.
Actually all SAAR and ITU stuff are optional for I6500 in real world so it's fine
to just leave I6500 defined without SAAR support. The main difference between I6400 and I6500 is multi-cluster support, I do have some patch for bringing proper multi-cluster support to QEMU, but it can't work with boston due to address space limitations. Should I give mips-virt stuff another go? Thanks - Jiaxun
Philippe Mathieu-Daudé (11): target/mips: Remove helpers accessing SAAR registers hw/misc/mips: Reduce itc_reconfigure() scope target/mips: Remove MIPSITUState::itu field target/mips: Remove CPUMIPSState::saarp field hw/misc/mips_itu: Remove MIPSITUState::cpu0 field hw/misc/mips_itu: Remove MIPSITUState::saar field target/mips: Remove CPUMIPSState::CP0_SAAR[2] field target/mips: Remove helpers accessing SAARI register target/mips: Remove CPUMIPSState::CP0_SAARI field target/mips: Remove the unused DisasContext::saar field target/mips: Remove I6500 CPU definition docs/about/removed-features.rst | 5 +++ include/hw/misc/mips_itu.h | 6 --- target/mips/cpu.h | 4 -- target/mips/tcg/translate.h | 1 - target/mips/tcg/sysemu_helper.h.inc | 6 --- hw/mips/cps.c | 3 -- hw/misc/mips_itu.c | 35 ++-------------- target/mips/sysemu/machine.c | 4 +- target/mips/tcg/sysemu/cp0_helper.c | 63 ----------------------------- target/mips/tcg/translate.c | 62 ---------------------------- tests/qtest/machine-none-test.c | 2 +- target/mips/cpu-defs.c.inc | 40 ------------------ 12 files changed, 12 insertions(+), 219 deletions(-)
-- --- Jiaxun Yang
