Remove the unused CP0_SAARI register. Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org> --- target/mips/cpu.h | 1 - target/mips/sysemu/machine.c | 2 +- 2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/target/mips/cpu.h b/target/mips/cpu.h index e621196ae1..c65e5fa162 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -747,7 +747,6 @@ typedef struct CPUArchState { * CP0 Register 9 */ int32_t CP0_Count; - uint32_t CP0_SAARI; #define CP0SAARI_TARGET 0 /* 5..0 */ #define CP0SAAR_BASE 12 /* 43..12 */ #define CP0SAAR_SIZE 1 /* 5..1 */ diff --git a/target/mips/sysemu/machine.c b/target/mips/sysemu/machine.c index 6d1299a89e..213fd637fc 100644 --- a/target/mips/sysemu/machine.c +++ b/target/mips/sysemu/machine.c @@ -281,7 +281,7 @@ const VMStateDescription vmstate_mips_cpu = { VMSTATE_UINT32(env.CP0_BadInstrP, MIPSCPU), VMSTATE_UINT32(env.CP0_BadInstrX, MIPSCPU), VMSTATE_INT32(env.CP0_Count, MIPSCPU), - VMSTATE_UINT32(env.CP0_SAARI, MIPSCPU), + VMSTATE_UNUSED(sizeof(uint32_t)), /* was CP0_SAARI */ VMSTATE_UNUSED(2 * sizeof(uint64_t)), /* was CP0_SAAR[2] */ VMSTATE_UINTTL(env.CP0_EntryHi, MIPSCPU), VMSTATE_INT32(env.CP0_Compare, MIPSCPU), -- 2.41.0