The upcoming RISC-V Ssdtso specification introduces a bit in the senvcfg CSR to switch the memory consistency model of user mode at run-time from RVWMO to TSO. The active consistency model can therefore be switched on a per-hart base and managed by the kernel on a per-process base.
This patch treats Ssdtso similar to TSO, i.e., the guest is always being executed in TSO mode, which simplifies the implementation a lot while still being correct. The downside is, that we have a performance penalty on hosts that don't run with TSO. This patch implements basic Ssdtso support and adds a prctl API on top so that user-space processes can switch to a stronger memory consistency model (than the kernel was written for) at run-time. This series is based on the third draft of the Ssdtso specification which can be found here: https://github.com/riscv/riscv-ssdtso/releases/tag/v1.0-draft3 Note, that the Ssdtso specification is in development state (i.e., not frozen or even ratified) which is also the reason why this series is marked as RFC. This series saw the following changes since v1: * Adding compatibility with Ztso (spec change in draft 3) * Use PR_MEMORY_CONSISTENCY_MODEL* instead of numeric constants This series is based on riscv-to-apply.next with two series on top: * Sync hwprobe keys with kernel https://lists.gnu.org/archive/html/qemu-devel/2024-02/msg01293.html * Add Ztso extension https://lists.gnu.org/archive/html/qemu-devel/2024-02/msg01296.html This patchset can also be found in this GitHub branch: https://github.com/cmuellner/qemu/tree/ssdtso-v2 A Linux implementation of DTSO can be found in this GitHub branch: https://github.com/cmuellner/linux/tree/ssdtso-v2 Christoph Müllner (4): RISC-V: Add support for Ssdtso linux-user/riscv: Add Ssdtso extension to hwprobe linux-user/prctl: Add dynamic memory consistency model prctl API linux-user/riscv: Implement dynamic memory consistency model support linux-user/riscv/target_prctl.h | 76 ++++++++++++++++++++++++++++++++- linux-user/syscall.c | 20 +++++++++ target/riscv/cpu.c | 13 +++++- target/riscv/cpu.h | 1 + target/riscv/cpu_bits.h | 3 ++ target/riscv/cpu_cfg.h | 1 + target/riscv/csr.c | 14 ++++-- target/riscv/translate.c | 2 +- 8 files changed, 123 insertions(+), 7 deletions(-) -- 2.43.0
