On Thu, 4 Jan 2024 03:36:06 +0000 Ankit Agrawal <ank...@nvidia.com> wrote:
> Thanks Jonathan for the review. > > > As per reply to the cover letter I definitely want to see SRAT table dumps > > in here though so we can easily see what this is actually building. > > Ack. > > > I worry that some OS might make the assumption that it's one GI node > > per PCI device though. The language in the ACPI specification is: > > > > "The Generic Initiator Affinity Structure provides the association between > > _a_ > > generic initiator and _the_ proximity domain to which the initiator > > belongs". > > > > The use of _a_ and _the_ in there makes it pretty explicitly a N:1 > > relationship > > (multiple devices can be in same proximity domain, but a device may only be > > in one). > > To avoid that confusion you will need an ACPI spec change. I'd be happy to > > support > > Yeah, that's a good point. It won't hurt to make the spec change to make the > possibility of the association between a device with multiple domains. > > > The reason you can get away with this in Linux today is that I only > > implemented > > a very minimal support for GIs with the mappings being provided the other > > way > > around (_PXM in a PCIe node in DSDT). If we finish that support off I'd > > assume > > Not sure if I understand this. Can you provide a reference to this DSDT > related > change? You need to add the PCI tree down to the device which is a bit fiddly if there are switches etc. I'm also not sure I ever followed up in getting the PCI fix in after we finally dealt with the issue this triggered on old AMD boxes (they had devices that claimed to be in non existent proximity domains :( later at least one path to hit that was closed down - I'm not sure all of them were). Anyhow, the fix for PCI include an example where the EP has a different PXM to the root bridge. In this example 0x02 is the GI node. https://lore.kernel.org/all/20180912152140.3676-2-jonathan.came...@huawei.com/ > Device (PCI2) > { > Name (_HID, "PNP0A08") // PCI Express Root Bridge > Name (_CID, "PNP0A03") // Compatible PCI Root Bridge > Name(_SEG, 2) // Segment of this Root complex > Name(_BBN, 0xF8) // Base Bus Number > Name(_CCA, 1) > Method (_PXM, 0, NotSerialized) { > Return(0x00) > } > > ... > Device (BRI0) { > Name (_HID, "19E51610") > Name (_ADR, 0) > Name (_BBN, 0xF9) > Device (CAR0) { > Name (_HID, "97109912") > Name (_ADR, 0) > Method (_PXM, 0, NotSerialized) { > Return(0x02) > } > } > } > } Without that PCI fix, you'll only see correct GI mappings in Linux for platform devices. Sorry for slow reply - I missed the rest of this thread until I was brandishing as an argument for another discussion on GIs and noticed it had carried on with out me. Jonathan
