On Fri, Apr 06, 2007 at 08:22:21AM +0200, Blue Swirl wrote: > >The attached patch fully implements IEEE exceptions on the SPARC target. > > Nice work, thank you. Do you know of any code that uses the exceptions?
I guess no code is using IEEE exceptions to generate a trap, because defining a signal handler for SIGFPE is highly non-standard. However a few programs are querying FSR to check the AEXC flags after a sequence of floating point instructions. This is the case for example of the SUN Java J2RE. > The flags enabling exceptions could be recorded to TB flags so that the > check code is generated only when needed, see cpu-exec.c:180. Well I doubt it is possible, because check_ieee_exceptions() generates a trap if the TEM flags in the FSR register are set, but also update the AEXC flag in FSR. I even doubt lazy FSR is possible here, because it accumulates the exceptions of all floating points instructions since those flags are cleared. -- .''`. Aurelien Jarno | GPG: 1024D/F1BCDB73 : :' : Debian developer | Electrical Engineer `. `' [EMAIL PROTECTED] | [EMAIL PROTECTED] `- people.debian.org/~aurel32 | www.aurel32.net
