On 8/21/06, malc <[EMAIL PROTECTED]> wrote:
On Mon, 21 Aug 2006, Igor Kovalenko wrote:

> On 8/21/06, malc <[EMAIL PROTECTED]> wrote:
>>
>> On Mon, 21 Aug 2006, Igor Kovalenko wrote:
>>
>> <snip>
>>
>> > Right. Here is the real one with correct case labels.
>>
>> Sorry, forgot to mention that atop of the hex/bin problem the code also
>> suffers from lack of proper 16/64 bit modrm decoding.
>
>
> seems to me that 16 and 64 bit cases does not apply here

Well, quick experiment in vm86 environment suggests that i'm right at
least for 16bit case.

<moo.asm>
         xor ax, ax
         int 16h
         db 0xf, 0x19, 5, 0xde, 0xad
         db 0xf, 0x19, 5, 0xbe, 0xef
         mov ah, 9
         mov dx, erm
         add dx, 0x100
         int 21h
         xor ax, ax
         int 16h
         ret
erm     db     "moo$"
</moo.asm>

nasm -o moo.com moo.asm
dosemu moo.com

64bit case should be investigated by someone who possesses 64bit OS.

Here is the updated patch, should implement 16/32/64 modes according to public intel docs.
Operand size is taken from DisassContext->dflag which is set beforehand; I assume it is decoded correctly wrt appropriate instruction prefixes.

--
Kind Regards,
Igor V. Kovalenko
Index: target-i386/translate.c
===================================================================
RCS file: /cvsroot/qemu/qemu/target-i386/translate.c,v
retrieving revision 1.59
diff -u -r1.59 translate.c
--- target-i386/translate.c     10 Jul 2006 19:53:04 -0000      1.59
+++ target-i386/translate.c     30 Aug 2006 19:19:45 -0000
@@ -1615,6 +1615,63 @@
     *offset_ptr = disp;
 }
 
+static void gen_nop_modrm(DisasContext *s, int modrm)
+{
+    int rm, mod;
+    rm  = modrm & 7;
+    mod = (modrm >> 6) & 3;
+
+    switch (s->dflag)
+    {
+        case 0:
+            /* 16 bit */
+            if (mod == 0 && rm == 6)
+            {
+                /* 16 bit data follows */
+                s->pc += 2;
+            }
+            else if (mod < 3)
+            {
+                /* 0, 8 or 16 bit data follows */
+                s->pc += mod;
+            }
+            break;
+
+        case 2:
+            /* 64 bit, modr/m size does not change, use 32 bit case */
+        case 1:
+            /*32 bit*/
+            if (mod == 0 && rm == 5)
+            {
+               /* 32 bit data follows */
+               s->pc += 4;
+            }
+            else
+            {
+                if (mod < 3 && rm == 4)
+                {
+                    /* SIB byte follows */
+                    s->pc += 1;
+                }
+
+                if (mod == 1)
+                {
+                    /* 8 bit data follows */
+                    s->pc += 1;
+                }
+                else if (mod == 1)
+                {
+                    /* 32 bit data follows */
+                    s->pc += 4;
+                }
+            }
+            break;
+        default:
+            /* undefined */
+            break;
+    }
+}
+
 /* used for LEA and MOV AX, mem */
 static void gen_add_A0_ds_seg(DisasContext *s)
 {
@@ -5792,9 +5849,15 @@
             /* nothing more to do */
             break;
         default:
-            goto illegal_op;
+            gen_nop_modrm(s, modrm);
+            break;
         }
         break;
+    case 0x119 ... 0x11f:
+        /* multi-byte noop */
+        modrm = ldub_code(s->pc++);
+        gen_nop_modrm(s, modrm);
+        break;
     case 0x120: /* mov reg, crN */
     case 0x122: /* mov crN, reg */
         if (s->cpl != 0) {
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