Paul Brook wrote:
> qemu hardware does support DMA, but I don't think this matters.
> By my reading DMA writes don't need to wake mwait.
> The exact wording is "store operation", which I'd expect to mean
> execution of a store instruction (by a different CPU).

Hmm.  x86 CPUs snoop writes by DMA as well as other CPUs, and I'd
expect write snooping to be the mechanism used by 'mwait'.

It would be good to test on a real system whether DMA wakes 'mwait'.

I wouldn't expect many OSes to use this, but I have seen tuned
networking OSes which would benefit from 'mwait' on a network DMA ring
descriptor.

-- Jamie


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