Fabrice Bellard wrote:
2. [PATCH][MIPS] add "lwu" instruction
http://lists.gnu.org/archive/html/qemu-devel/2006-04/msg00326.html
On which MIPS CPU is it defined ? Need to track instruction sets exactly
to be able to select a given MIPS CPU at compile time or dynamically.
3. [PATCH] Add special MIPS multiply instructions
http://lists.gnu.org/archive/html/qemu-devel/2006-04/msg00375.html
Same remark.
These are NEC VR54xx specific extensions to the MIPS
instruction set.
They are used if you use GCC's -march=vr5400 option. See
www.necelam.com/docs/files/1375_V2.pdf
as well.
9. [PATCH] Update MIPS status register with EXL and ERL bits at exception
http://lists.gnu.org/archive/html/qemu-devel/2006-06/msg00329.html
OK but the following lines are suspicious:
Yes, I see. I mixed two fixes, let me explain below:
- env->hflags = MIPS_HFLAG_ERL;
+ env->hflags |= MIPS_HFLAG_ERL;
This is a typo fix for a missing "or" (it should be "|="
instead of only "="). hflags is used as a shadow of the
status register and there not the whole value should be set,
only the corresponding flag. See for example correct usage
of MIPS_HFLAG_EXL or MIPS_HFLAG_ERL in helper.c or op.c of
target-mips. There, they are correctly used everywhere with
"|=" or "&= ~", except at this place.
+ env->CP0_Status &= (1 << CP0St_ERL);
This is part of the "Update status register EXL and ERL
flags directly, entering or leaving exception, not only hflags".
So this two added lines fix the missing "or" and set the
flag in the status register as well, not only in hflags.
If you like you can apply the single "|=" line as a typo
fix, and the rest as an additional fix to update status
register as well with ERL and EXL.
Regards
Dirk
Btw: Many thanks for commenting all patches!
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