Tom Plunket wrote:
> Often (always?) RISC architectures' instruction+operand lengths
> are fixed to the word size of the machine. E.g. the MIPS 3000 and
> 4000 were 32 bits for every instruction, and PC was always a
^^
> multiple of four.Intels aren't RISC, are they? But for PowerPC it's the same, every instruction has 32 bit. Regards, Björn -- BOFH excuse #278: The Dilithium Crystals need to be rotated. -- http://mail.python.org/mailman/listinfo/python-list
