Bjoern Schliessmann wrote: > Tom Plunket wrote: > > > Often (always?) RISC architectures' instruction+operand lengths > > are fixed to the word size of the machine. E.g. the MIPS 3000 and > > 4000 were 32 bits for every instruction, and PC was always a > ^^ > > multiple of four. > > Intels aren't RISC, are they? > I think that "PC" referred to the CPU's Program Counter.
The x86 CPUs if typical Windows PCs aren't RISC but Intel also manufacture X-Scale (ARM core) processors which are. > But for PowerPC it's the same, every instruction has 32 bit. > As are those of ARM processors like X-Scale (although some ARM processors support the Thumb instruction set). -- http://mail.python.org/mailman/listinfo/python-list
