Hi Stephen,

Honestly I didn't think about it too deeply. I simply copied the same 
pattern that the x86-64 SSE2 code is using. If a second barrier is 
required, then I think it would be required in that path, too, and would 
represent a more general problem in the code.

Since this function is called Acquire_Store, I think that the single 
barrier is sufficient and that it's correctly placed. As an acquire, we 
want to make sure that no reads or writes from after the store actually 
happen before the store.

There is complementary function called Release_Store which has a barrier 
before its store.

/peter

On Thursday, January 23, 2014 11:33:44 AM UTC-5, stephentu wrote:
>
> I think you might actually want two memory barriers, something like
>
> MemoryBarrier();
> *ptr = value;
> MemoryBarrier();
>
> your current solution prevents compiler reordering the store with 
> statements after, but what about statements before?
>
>
> On Thu, Jan 23, 2014 at 11:20 AM, <[email protected] <javascript:>>wrote:
>
>>
>> Comment #1 on issue 599 by [email protected]: Fails to compile for Intel Phi
>> http://code.google.com/p/protobuf/issues/detail?id=599
>>
>> Thanks Stephen. ICC supports GCC's inline assembly syntax. I've applied 
>> your suggestion and tested it. An updated patch is attached.
>>
>> /peter
>>
>>
>> Attachments:
>>         atomicops_internals_x86_gcc.h.patch  658 bytes
>>
>>
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