Status: New
Owner: [email protected]
Labels: Type-Defect Priority-Medium
New issue 599 by [email protected]: Fails to compile for Intel Phi
http://code.google.com/p/protobuf/issues/detail?id=599
What steps will reproduce the problem?
1. Install Intel Composer XE with Intel Xeon Phi support
2. Configure protobuf for Intel Xeon Phi:
./configure --enable-shared --prefix="${DESTDIR}"
--host=x86_64-unknown-linux-gnu
--target=x86_64-unknown-linux-gnu "--with-protoc=${PROTOC}" "CXXFLAGS=-mmic" "LDFLAGS=-mmic"
CC=${ICC_BIN}/icc CXX=${ICC_BIN}/icpc
3. Build protobuf:
make install
What is the expected output? What do you see instead?
Protobuf should build. It fails to compile because Phi does not support
the SSE memory barrier instructions like LFENCE and MFENCE.
What version of the product are you using? On what operating system?
protobuf 2.5.0 on Linux, cross compiling for Linux on Intel Phi
Please provide any additional information below.
Intel Phi is a many-core coprocessor from Intel with up to 61 cores on
a single die. The Phi architecture is based on a heavily modified P5. It
does not support the legacy SSE, MMX and AVX vector instructions sets, and
it is a fully in-order architecture. Fence instructions are not supported
(because they're part of the SSE instruction set) and fence instructions
are not required (because it is in-order).
The attached patch removes the fence instructions if __MIC__ (i.e.
Intel Many Integrated Core Architecture) is defined.
Note that I've made MemoryBarrier() a no-op on Phi. I'm a bit nervous
about this. Although the chip is in-order, there's a risk that the compiler
may re-order instructions in an undesirable way. Suggestions for how to
make this more robust are welcome.
Attachments:
atomicops_internals_x86_gcc.h.patch 557 bytes
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