>>>>> "DS" == Dan Sugalski <[EMAIL PROTECTED]> writes:
DS> How much of the current base of target ports are you willing to
DS> give up in the first cut for fast? The TIL suggestion, amongst
DS> others, has the potential to speed things up rather a lot, but it
DS> has the disadvantage of requiring intimate knowledge of each
DS> target port. My preference is to get a snappy interpreter and
DS> leave the Java JIT-equivalents to the various chip/OS vendors, but
DS> I'd bet the TIL style would be faster.
i am in favor of TIL backend support. but maybe we should hold that off
for later after we get perl6 up and running. then platform by platform
(with help from the vendors) TIL generators can be written. by covering
x86, sparc, ppc, and rs6000 (and a few others), you cover most of the
cpu's. then others can be done by interested parties. this is much
simpler that true code generation and can almost be table driven as all
the code to be generated is a small subset of the cpu op codes. all that
is needed is some description of how to call subs, pass args, stack
stuff, etc.
uri
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