Given that the Linux kernel memory model (LKMM) is a class of "memory
model", it is better be listed under "Memory model" in Index.
As it is currently impossible to make acronym-related terms go to
second level, remove existing index markers of acronym (meaning
\IXacr --> \acr) and use additional index markers of \IXalthmr.
Given it goes under "Memory model", add a redirection of "Linux kernel
consistency model (LKMM)" to "Memory model, Linux kernel" as well.
Signed-off-by: Akira Yokosawa <aki...@gmail.com>
---
formal/axiomatic.tex | 5 +++--
indexsee.tex | 2 ++
memorder/memorder.tex | 12 ++++++++----
3 files changed, 13 insertions(+), 6 deletions(-)
diff --git a/formal/axiomatic.tex b/formal/axiomatic.tex
index 7d2fb0e7..35e01828 100644
--- a/formal/axiomatic.tex
+++ b/formal/axiomatic.tex
@@ -142,8 +142,9 @@ Axiomatic approaches may also be applied to higher-level
languages and also to higher-level synchronization primitives, as
exemplified by the lock-based litmus test shown in
\cref{lst:formal:Locking Example} (\path{C-Lock1.litmus}).
-This litmus test can be modeled by
-the
\IXacrf{lkmm}~\cite{Alglave:2018:FSC:3173162.3177156,LucMaranget2018lock.cat}.
+This litmus test can be modeled by the
+\IXalthmr{\acrf{lkmm}}{Linux kernel}{memory model}~%
+\cite{Alglave:2018:FSC:3173162.3177156,LucMaranget2018lock.cat}.
As expected, the \co{herd} tool's output features the string \co{Never},
correctly indicating that \co{P1()} cannot see \co{x} having a value
of one.\footnote{
diff --git a/indexsee.tex b/indexsee.tex
index 9f949378..089efd44 100644
--- a/indexsee.tex
+++ b/indexsee.tex
@@ -21,6 +21,7 @@
\index{Full memory barrier|see{Memory barrier, full}}
\index{Fully associative cache|see{Cache, fully associative}}
\index{Grace-period latency|see{Latency, grace-period}}
+\index{Linux kernel memory consistency model (LKMM)|see{Memory model, Linux
kernel}}
\index{Memory latency|see{Latency, memory}}
\index{Memory-barrier latency|see{Latency, memory-barrier}}
\index{Memory-barrier overhead|see{Overhead, memory-barrier}}
@@ -40,6 +41,7 @@
\index{Write miss|see{Cache miss, write}}
\index{Write-side critical section|see{Critical section, write-side}}
}{ % effective for single-level index
+\index{Linux kernel memory consistency model (LKMM)|see{Linux kernel memory
model}}
\index{Process consistency|see{Process memory consistency}}
\index{Sequential consistency|see{Sequential memory consistency}}
\index{Weak consistency|see{Weak memory consistency}}
diff --git a/memorder/memorder.tex b/memorder/memorder.tex
index ee2dc324..659ff71e 100644
--- a/memorder/memorder.tex
+++ b/memorder/memorder.tex
@@ -69,7 +69,8 @@ follows up with more detail on a few representative hardware
platforms.
The
\IXacrf{kcsan}~\cite{MarcoElver2020FearDataRaceDetector1,MarcoElver2020FearDataRaceDetector2},
based in part on
RacerD~\cite{SamBlackshear2018RacerD}
- and implementing \IXacr{lkmm}, has also been added to the Linux kernel
+ and implementing \IXalthmr{\acr{lkmm}}{Linux kernel}{memory model},
+ has also been added to the Linux kernel
and is now heavily used.
Finally, there are now better ways of describing the Linux-kernel
@@ -86,7 +87,8 @@ follows up with more detail on a few representative hardware
platforms.
{F. W. Nichol}
This section is for people who would like to avoid learning all the
-details of the Linux-kernel memory model (\IXacr{lkmm}), the better
+details of the \IXalthmr{Linux-kernel memory model (\acr{lkmm})}
+{Linux kernel}{memory model}, the better
to get on with their concurrency lives.
The good news is that learning a very small fraction of LKMM can get
you most of its benefits.
@@ -4495,7 +4497,8 @@ For their part, weakly ordered systems might well choose
to execute
the memory-barrier instructions required to guarantee both orderings,
possibly simplifying code making advanced use of combinations of locked
and lockless accesses.
-However, as noted earlier, \IXacr{lkmm} chooses not to provide these additional
+However, as noted earlier, \IXalthmr{\acr{lkmm}}{Linux kernel}{memory model}
+chooses not to provide these additional
orderings, in part to avoid imposing performance penalties on the simpler
and more prevalent locking use cases.
Instead, the \co{smp_mb__after_spinlock()} and \co{smp_mb__after_unlock_lock()}
@@ -5746,7 +5749,8 @@ None of these instructions exactly match the semantics of
Linux's
The \co{DMB} and \co{DSB} instructions have a recursive definition
of accesses ordered before and after the barrier, which has an effect
similar to that of \Power{}'s cumulativity, both of which are
-stronger than \IXacr{lkmm}'s cumulativity described in
+stronger than \IXalthmr{\acr{lkmm}}{Linux kernel}{memory model}'s
+cumulativity described in
\cref{sec:memorder:Cumulativity}.
\ARM\ also implements \IXalth{control dependencies}{control}{dependency},
--
2.43.0
