Nils, the V890 and all other US-III/IV machines except for the E10K/E25K are Uniform Memory Access with respect to I/O, so it should not matter which CPU/core you select.
This is because all memory is connected to on-CPU memory controllers and the IO bridge chip (Schizo, pcisch) transacts on the bus like a remote CPU and all memory is equally remote. Only for CPUs is some memory closer. Krister makes a good point that if you run your applications in a processor set, that is even better as user threads will not be preempted by kernel threads. HTH Paul >----- Begin Included Message -----< Date: Fri, 19 Jun 2009 17:52:02 +0200 From: "Nils Goroll" <sl...@schokola.de> Subject: [perf-discuss] V890 with US-IV+ : which core should interrupts be delivered to? To: perf-discuss@opensolaris.org Hi, I am trying to reduce context switches on a V890 with 16 cores by delegating one core to interrupt handling (by setting all others to nointr using psradm). Does the hardware design of this machine imply that (a) particular core(s) is best suited for this task? Thanks, Nils _______________________________________________ perf-discuss mailing list perf-discuss@opensolaris.org >----- End Included Message -----< _______________________________________________ perf-discuss mailing list perf-discuss@opensolaris.org
