The PSARC case you've found is for the DDI. See ddi_dma_mem_alloc(9F) for details about how a device may describe the cache attributes for allocated memory. As far as I know, there isn't a similar interface for application memory. The memcntl(2) interface allows you to set permissions on memory ranges, but it doesn't expose cache attributes.
-j On Wed, Feb 04, 2009 at 08:12:12AM -0800, Manfred M?cke wrote: > Hi, > > I wonder if OpenSolaris is providing an API to control memory caching on x86? > Clearly the AMD64 ISA covers this (global cache enable/disable, WBINVD, > memory-type range registers (MTRRs), page-attribute table (PAT)). But is any > of this available to user applications? man mmap does not give any hint. > > I found however the following entry at > http://jp.opensolaris.org/os/community/arc/caselog/2006/188/ > > --------------------------------------------------- > Memory Cache Disable Support on x86 > > PSARC 2006/188 (Approved FastTrack) > Submitted 21 March 2006 > Status closed approved fast-track 4/5/2006 > Duration 15 Days > Submitter Eiji Ota > Case Owner Shudong Zhou > > Case Materials > Exposure: manual > Case Event Log Date Event Comment > 21 Mar 2006 CreatedFastTrack > 21 Mar 2006 Associated 20060321_eiji.ota PSARC/2006/188 > 22 Mar 2006 New SACProject 2006/188 PSARC waiting fast-track 3/28/2006 > 22 Mar 2006 New Project 2006/188 03/21/2006 Memory Cache Disable > Support on x86 > 30 Mar 2006 New Status waiting fast-track 4/4/2006 > 6 Apr 2006 New Status closed approved fast-track 4/5/2006 > --------------------------------------------------- > > > Thanks, Manfred > -- > This message posted from opensolaris.org > _______________________________________________ > perf-discuss mailing list > perf-discuss@opensolaris.org _______________________________________________ perf-discuss mailing list perf-discuss@opensolaris.org
