Are the sparc TLBs transparent as to instrucitons or data? At one point I though I read that I and D tlbs were separate entities.
> -----Original Message----- > From: [EMAIL PROTECTED] > [mailto:[EMAIL PROTECTED] On Behalf Of Eric Lowe > Sent: Wednesday, October 05, 2005 10:31 AM > To: Marc Rocas > Cc: perf-discuss@opensolaris.org; [EMAIL PROTECTED]; Kit Chow > Subject: Re: [perf-discuss] NUMA ptools and ISM segments > > On Tue, Oct 04, 2005 at 09:54:17PM -0400, Marc Rocas wrote: > | > | That's correct. We've measured 3-5% improvement with 4MB pages on > | SPARC and simply wanted to carry over to amd64. We have not carried > | out the measurements on amd64 to compare 4KB vs. 2MB pages > since the > | ratio is the same as in SPARC. Also, off the top of my > head, I can't > | remember whether Opteron is on par or worse as far as its TLB is > | concerned as compare to SPARC. > > US-III+/IV/IV+ have 512 TLB entries for 4M pages when processes use 4M > pages, and 512 TLB entries for 8K pages. If the process is > using only 8K pages the TLB has 1024 entries. > > The Opteron has a 1024 entry TLB for 4K pages and a 16 entry > TLB for 2M pages. > > -- > Eric Lowe Solaris Kernel Development Austin, Texas > Sun Microsystems. We make the net work. > x64155/+1(512)401-1155 > _______________________________________________ > perf-discuss mailing list > perf-discuss@opensolaris.org > _______________________________________________ perf-discuss mailing list perf-discuss@opensolaris.org
