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Hello
On 2023/10/12 13:59, Chuanhong Guo wrote:
Hi!
On Thu, Oct 12, 2023 at 5:02 AM Randy Li via openwrt-devel
<openwrt-devel@lists.openwrt.org> wrote:
Subject: [PATCH 1/2] ath79: correct switch PHYs for GMAC0 in ar934x
According to Ethernet Subsystem section of Functional Description
chapter of the datasheet, when GMAC0 connects to the internal
switch, it is MDC/MDIO of the GMAC0 decided which PHY it should
talk to.
The switch decides whether internal PHYs respond to direct PHY access
from GMAC MDIO. If the switch built-in MDIO bus is enabled, all the PHYs
I really doubt about that. SW_ONLY_MODE bit in in GMAC Interface regiser
which controls the global GMAC.
I didn't see other register that could prevent GMAC0 from accessing PHY0
or PHY4.
only respond to switch MDIO requests and ignore the ones from GMAC
MDIO. If u-boot enables switch MDIO (many vendor u-boot do so),
I didn't have a vendor u-boot here, it is a legacy platform. The most
devices for openwrt MOD would use a u-boot with http flashback.
Which only enable configure the network when it is needed or it would
slow down the booting.
PHYs defined in GMAC MDIO won't be discovered until a switch reset.
ag71xx_hw_init() would be called in ag71xx_probe(), I don't think it
would be problem.
Also, I vaguely remembered that the AR934X GMAC0 MDIO is always the
external one and the built-in switch is on MDIO1. Have you tested this on
I am very confusing with the config for device likes tl-wr841hp-v2,
which uses GMAC1 for wan while eth0 for the lan.
Also I think there is good reason for using GMAC0(eth0) for wan and
GMAC1 for the lan, because the hardware acceleration is designed for that.
existing devices?
I don't have any existing device but a ODM device which is made by
Shenzhen SHX Technology Co., Ltd.
I verify it there.
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