On Wed, 29 Jan 2020 17:40:43 +0100 "Roger Pueyo Centelles | Guifi.net via openwrt-devel" <openwrt-devel@lists.openwrt.org> wrote:
> Hi all, > > It seems like the NAND flash is read with different endiannesses: > > [...] > > I wonder, though, which is the "correct" one --or how to change > ath79's, so that it is coherent with the previous target--. > > Roger > Hello Roger, Please try adding 'qca,nand-swap-dma;' to '&nand' section in router dts file. This in theory should fix endianness problem. Explanation: In ar71xx target this router is initialized by file target/linux/ar71xx/files/arch/mips/ath79/mach-rb922.c. NAND controller setup is located in function rb922gs_nand_init(), there 'ath79_nfc_set_swap_dma(true)' is invoked. In ath79 device tree such byte-swapping is enabled by setting 'qca,nand-swap-dma'. By looking at C file, I have also found that this router uses model-specific ath79_nfc_set_scan_fixup() routine - a functionality that is not implemented in ath79, because there was no need for such quirks, at least not until now. Best regards Michal _______________________________________________ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
