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On Tue, 6 Aug 2019 16:35:34 +0200
"Adrian Schmutzler" <m...@adrianschmutzler.de> wrote:
> Hi,
>
> > +&pcie {
> > + status = "okay";
> > +
> > + ath9k: wifi@0,0 {
> > + compatible = "pci168c,002e";
> > + reg = <0x0000 0 0 0 0>;
> > + mtd-mac-address = <&art 0x00>;
> > + mtd-mac-address-increment = <1>;
> > + mtd-cal-data = <&art 0x1000>;
> > + qca,no-eeprom;
> > + #gpio-cells = <2>;
> > + gpio-controller;
> > +
> > + usb {
> > + gpio-hog;
> > + line-name = "netgear:power:usb";
> > + gpios = <4 GPIO_ACTIVE_HIGH>;
> > + output-high;
> > + };
> > + };
> > +};
>
> Sure that this is the correct location for the usb hog?
>
> Best
>
> Adrian
Hi,
I decided to put it here as USB is controlled by pin 4 of wireless chip
not CPU. If there is another better formal way to define it, please let
me know. I've analyzed gpio_hog patch for other dts files but all these
routers steer USB via GPIO pins connected to main SoC.
Cheers
Michal
-----BEGIN PGP SIGNATURE-----
iQIzBAEBCAAdFiEEi7ylFMzTSbpOuOZIHU8//LdGKWsFAl1JnZwACgkQHU8//LdG
KWsKMg//bj/Wb3O0A61q8tFpbfRqV/O7OXHXjj+pC6v2wCVYkqTdienTCjx2MAnH
HNjr6T50iC00IO0zdQCIzJZHQ0h5WbK0VHH5Ijcl7Igm9+rkLMY2wYDohQjFFR/+
ZczWbULYLR2xsqFDEBCcCaY7VTYuhOz2P08N0vSjqZCNjL/+EQQmODZZJY+bcYuS
+Gyps3QROpuvRE5c4EWPkp0pxgTEqfBjCIVpHtBpqoguNicw+t4uais/F0oY/Su4
bGTcB1tzd8CSiQTtjdF3fxtpv9K5emab4MOYGKmcYzNKp7RP/s9KFRpdb2p14F+S
ke9uG+qxxvF8H5a4dZhmS72tKcy9CyPzFa89YA1ovLL4OsHFa/io7hvNdwe6iJjF
H+8T4SpPJXC+EQdt8XGra5bvRPh2efsp0egNBFRR70dmEP+A67rlpcw4cawSEUC+
vnkEmFTXKVz2UOjiC9YOUyDkUYNKpYtYAqrgpKGmzb7rKRohca34D5Wk5yfRCLZS
DJL2utcFqaZJepWkYo7zqhJYjb/OGmHL2VMfSTVdXtmw/uJz0gkVBAZrQe06rimO
GTvc396eQ+qcQJ4zI0z1JVh5Elf95UJst/0eDaJlrTxGaYfhkYxt8e3miWhfJLBy
eZRHsq4YHE3g3nmrs77Aa6k0Ec3sBiG5RuVkuWep23SgwsYTOVY=
=ODtO
-----END PGP SIGNATURE-----
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