Hello Etienne, On 15.07.19 04:30, Etienne Champetier wrote: > Hi David, > > Le dim. 14 juil. 2019 à 04:25, David Bauer <m...@david-bauer.net> a écrit : >> >> Hi Etienne, >> >> one small remark: >> >> On 14.07.19 04:43, Etienne Champetier wrote: >>> ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 0); >>> ath79_eth1_data.mii_bus_dev = &rbwapgsc_phy_device.dev; >>> ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII; >>> ath79_eth1_data.phy_mask = BIT(RBWAPGSC_MDIO_PHYADDR); >>> + ath79_eth1_data.enable_sgmii_fixup = 1; >> >> This should be dropped as it's not necessary anymore. > > Did some more tests and it's definitely needed (here this is ar71xx & > Linux 4.14) > It's still used for other boards, could you detail why it's not needed > anymore, since what version, reference some commits ?
You are right, it is needed. I was only focused on the workaround for the PHY side, but we indeed explicitly need to enable the MAC side workaround too. So this looks good to me. Best wishes David > > Thanks > Etienne > >> >> Best wishes >> David >> >>> ath79_eth1_pll_data.pll_1000 = 0x03000101; >>> ath79_eth1_pll_data.pll_100 = 0x80000101; >>> ath79_eth1_pll_data.pll_10 = 0x80001313; >>> _______________________________________________ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
