Hey, I believe this patch can be merged as is. According to Sricharan R. [1]: "It is [sleep clk] derived from a 48M wifi refclk
48M wifi ref clk -> [/2 divider] -> [/750 divider] -> sleep_clk (32000)" [1] https://patchwork.kernel.org/comment/22721613/ пт, 17 мая 2019 г., 11:16 Павел <be.diss...@gmail.com>: > > > чт, 16 мая 2019 г., 15:22 Sven Eckelmann <s...@narfation.org>: > >> On Tuesday, 14 May 2019 15:42:18 CEST Pavel Kubelun wrote: >> > +--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi >> > ++++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi >> > +@@ -141,9 +141,9 @@ >> > + }; >> > + >> > + clocks { >> > +- sleep_clk: sleep_clk { >> > ++ sleep_clk: gcc_sleep_clk_src { >> > + compatible = "fixed-clock"; >> > +- clock-frequency = <32768>; >> > ++ clock-frequency = <32000>; >> > + #clock-cells = <0>; >> > + }; >> >> On Thursday, 16 May 2019 13:18:14 CEST Павел wrote: >> [...] >> > > And maybe some of these guys also know how to find the ipq40xx clock >> > > controller reference or hardware reference. Because I was only able to >> > > verify >> > > for IPQ8072 that it had a 32.768 KHz sleep clock. But the >> > > >> > >> > If you are completely sure about that, then I guess that they have >> > (un)intentionally messed with the clock in QSDK, because they state that >> > ipq807x has the same 32000 khz crystal. >> > >> https://source.codeaurora.org/quic/qsdk/oss/kernel/linux-msm/tree/arch/arm64/boot/dts/qcom/qcom-ipq807x-soc.dtsi?h=eggplant#n2055 >> >> Confidence is the wrong word. I can only state that this is written in >> 80-YA727-13 Rev. D (IPQ8072.AP.HK07). Same for other devices like >> IPQ8078 AP.HK02, IPQ8074 AP.HK01, ... >> >> But I found in the same document that they call it the "32 KHz sleep >> clock in" >> in one section and and in another table "32.768 KHz sleep clock input to >> the >> IPQ8072" (next to the name "...32K..."). So it is now to the reader to >> find >> out what they meant here in which reference document. So maybe they also >> meant >> 32.768 KHz when in the IPQ4019 Watchdog document when they wrote 32 Khz >> sleep >> clock... who knows. >> > > Okay, here what I've found in oem firmware (Zyxel nbg6617) > > There are 2 clocks related to timer in oem firmware: > 1. gcc_sleep_clk_src - 32.000 > ^---USB3 sleep clock > ^---USB2 sleep clock > 2. wifi_rtc_clk_src - 32.768 > ^---wcnssN sleep clock > ^---wcnssN sleep clock > > In upstream we don't have wifi_rtc clk and all mentioned childs are > connected to sleep clk. > > So sleep clock at 32000 rate looks like some kind of a workaround and not > to break wifi they introduced a separate clock for that, the one that > really represents the hardware. > > I'll drop the sleep clock rate change in the next version of patchset > since we don't need that kind of workaround for now. > > >> My gut feeling (sorry, not an HW guy) tell me that they are just using a >> 32.768 KHz clock (from a standard 32.768 KHz oscillator) in all these >> products >> and just shortened it to 32K at some point in the document. And now >> Gopinath >> Sekar wrote 32000 instead of 32768. But I absolutely don't know what >> actually >> is there in HW. >> >> Kind regards, >> Sven >> >> [1] >> https://source.codeaurora.org/quic/qsdk/oss/kernel/linux-msm/commit/?id=d92ec59973484acc86dd24b67f10f8911b4b4b7d > >
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