Bjørn Mork <bj...@mork.no> writes:
> Bjørn Mork <bj...@mork.no> writes:
>> John Crispin <j...@phrozen.org> writes:
>>
>>> have you seen my staging tree ?
>>> https://git.openwrt.org/?p=openwrt/staging/blogic.git;a=shortlog;h=refs/heads/mt7621_dsa
>>
>> No, I hadn't. Thanks for the pointer. Will look at it now
>
>
> I've now tried to build this with the WAP6805, but I'm afraid I can't
> get the second gmac to work. Probably something I did wrong with the
> DTS... DSA and eth0 seems to work fine.
>
> This is your mt7621_dsa branc with my attempt to use it on the WAP6805
> on top: https://github.com/bmork/LEDE/tree/blogic-mt7621-mainline-eth
FWIW, I experimented a bit by removing code I didn't understand. There
was some hardcoded initialisation in mtk_hw_init() which didn't look
very reassuring. And what do you know? Removing it made the second
gmac work in my device.
I've added the removal patch to the branch on github. And it's attached
here as well.
Comments appreciated.
Bjørn
>From a926747f15681b680e8e341dfbc7959af1878f71 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Bj=C3=B8rn=20Mork?= <bj...@mork.no>
Date: Mon, 15 Oct 2018 19:01:11 +0200
Subject: [PATCH] mt7621: test mtk_hw_init() hunk
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Signed-off-by: Bjørn Mork <bj...@mork.no>
---
.../202-Adding-MT7621-DSA-support.patch | 36 ----------------------
target/linux/ramips/patches-4.14/205-mtk-eth.patch | 34 --------------------
2 files changed, 70 deletions(-)
diff --git a/target/linux/ramips/patches-4.14/202-Adding-MT7621-DSA-support.patch b/target/linux/ramips/patches-4.14/202-Adding-MT7621-DSA-support.patch
index f1cfa07e7415..b01c03610970 100644
--- a/target/linux/ramips/patches-4.14/202-Adding-MT7621-DSA-support.patch
+++ b/target/linux/ramips/patches-4.14/202-Adding-MT7621-DSA-support.patch
@@ -198,42 +198,6 @@ Index: linux-4.14.61/drivers/net/ethernet/mediatek/mtk_eth_soc.c
mtk_tx_irq_enable(eth, MTK_TX_DONE_INT);
mtk_rx_irq_enable(eth, MTK_RX_DONE_INT);
}
-@@ -1953,6 +1989,27 @@ static int mtk_hw_init(struct mtk_eth *e
- }
- regmap_write(eth->ethsys, ETHSYS_SYSCFG0, val);
-
-+#ifdef CONFIG_SOC_MT7621
-+
-+#define SYSC_PAD_RGMII2_MDIO 0x58
-+#define SYSC_GPIO_MODE 0x60
-+#define SYSC_REG_CFG1 0x14
-+ printk("MT7621: GE2: Pininit\n");
-+
-+ /* reduce RGMII1 PAD driving strength */
-+ regmap_read(eth->ethsys, SYSC_PAD_RGMII2_MDIO, &val);
-+ // MDIO
-+ val &= ~(3 << 4);
-+ // RGMII2, 12mA
-+ val &= ~(3 <<20);
-+ val |= (2 << 20);
-+ regmap_write(eth->ethsys, SYSC_PAD_RGMII2_MDIO, val);
-+
-+ /* gpio mux - RGMII1&RGMII2=Normal mode, set GMAC1,2 RGMII mode */
-+ regmap_read(eth->ethsys, SYSC_GPIO_MODE, &val);
-+ val &= ~(BIT(14) | BIT(15) | 3 << 12 | 3 << 14);
-+ regmap_write(eth->ethsys, SYSC_GPIO_MODE, val);
-+#else
- if (eth->pctl) {
- /* Set GE2 driving and slew rate */
- regmap_write(eth->pctl, GPIO_DRV_SEL10, 0xa00);
-@@ -1963,6 +2020,7 @@ static int mtk_hw_init(struct mtk_eth *e
- /* set GE2 TUNE */
- regmap_write(eth->pctl, GPIO_BIAS_CTRL, 0x0);
- }
-+#endif
-
- /* Set linkdown as the default for each GMAC. Its own MCR would be set
- * up with the more appropriate value when mtk_phy_link_adjust call is
@@ -2548,13 +2606,15 @@ static int mtk_probe(struct platform_dev
}
}
diff --git a/target/linux/ramips/patches-4.14/205-mtk-eth.patch b/target/linux/ramips/patches-4.14/205-mtk-eth.patch
index 19072a5d8b28..dccc23c4e7be 100644
--- a/target/linux/ramips/patches-4.14/205-mtk-eth.patch
+++ b/target/linux/ramips/patches-4.14/205-mtk-eth.patch
@@ -37,40 +37,6 @@ Index: linux-4.14.61/drivers/net/ethernet/mediatek/mtk_eth_soc.c
val &= ~SYSCFG0_GE_MODE(SYSCFG0_GE_MASK, eth->mac[i]->id);
val |= SYSCFG0_GE_MODE(eth->mac[i]->ge_mode, eth->mac[i]->id);
}
-@@ -1998,17 +2002,26 @@ static int mtk_hw_init(struct mtk_eth *e
-
- /* reduce RGMII1 PAD driving strength */
- regmap_read(eth->ethsys, SYSC_PAD_RGMII2_MDIO, &val);
-- // MDIO
-+ // MDIO driving 2mA
- val &= ~(3 << 4);
-- // RGMII2, 12mA
-- val &= ~(3 <<20);
-- val |= (2 << 20);
-- regmap_write(eth->ethsys, SYSC_PAD_RGMII2_MDIO, val);
-
-- /* gpio mux - RGMII1&RGMII2=Normal mode, set GMAC1,2 RGMII mode */
-+ if (eth->mac[1]) {
-+ // When 2nd MAC is enabled set pin strength.
-+ // RGMII2, 12mA
-+ val &= ~(3 <<20);
-+ val |= (2 << 20);
-+ regmap_write(eth->ethsys, SYSC_PAD_RGMII2_MDIO, val);
-+ };
-+
-+ /* set GMAC1,2 RGMII mode */
- regmap_read(eth->ethsys, SYSC_GPIO_MODE, &val);
-- val &= ~(BIT(14) | BIT(15) | 3 << 12 | 3 << 14);
-+ val &= ~(3<<12); // MDIO_MODE = MDIO
-+ val &= ~(BIT(15) | BIT(14)); // RGMIIx GPIO MODE = RGMIIx
-+ if (!eth->mac[1])
-+ val |= BIT(15);
- regmap_write(eth->ethsys, SYSC_GPIO_MODE, val);
-+
-+
- #else
- if (eth->pctl) {
- /* Set GE2 driving and slew rate */
@@ -2055,7 +2068,7 @@ static int mtk_hw_init(struct mtk_eth *e
mtk_w32(eth, MTK_RX_DONE_INT, MTK_QDMA_INT_GRP2);
mtk_w32(eth, 0x21021000, MTK_FE_INT_GRP);
--
2.11.0
_______________________________________________
openwrt-devel mailing list
openwrt-devel@lists.openwrt.org
https://lists.openwrt.org/mailman/listinfo/openwrt-devel
