On Mon, Apr 8, 2013 at 6:20 PM, Drasko DRASKOVIC
<drasko.drasko...@gmail.com> wrote:
> Hi John,
> You will have to know RAM controller config to prepare RAM before
> writing into it. This usually goes to OpenOCD script and is executed
> via MIPS EJTAG. But is often just a question of writing several
> registers (sometimes in the right order)
>
> You can look in U-Boot code from Carambola (8th devices), and see if
> you can find something useful there.
>
> Does not Toplink provide U-Boot and Linux? If yes, then U-Boot will
> set-up RAM, and from there on you can put stuff there.

Not sure yet how the board will be set up when they come. English is
not their strong suit so it is hard asking questions.

I definitely want to get all of the source and rebuild everything
before shipping anything off to customers. I'm not a fan of blindly
trusting binary blobs.

>
> BR,
> Drasko
>
>
> On Tue, Apr 9, 2013 at 12:10 AM, Daniel Golle <dgo...@allnet.de> wrote:
>> Hi!
>>
>> On 04/09/2013 12:38 AM, jonsm...@gmail.com wrote:
>>> Does the MIPS u-boot in the OpenWRT tree run on the RT5350? If so,
>>
>> U-Boot for Ralink chips is not (yet) part of OpenWrt, however, you can 
>> compile
>> it from the sources on
>> https://github.com/8devices/u-boot
>>
>> Flashing the boards via JTAG will require you to initialize some registers of
>> the SoC (at least SDRAM configuration, so you can load U-Boot into the ram 
>> and
>> flash using U-Boot).
>> OpenOCD contains code for some Atheros SoCs, that should be useful to get an
>> impression of what needs to be done to support other type of MIPS SoCs.
>>
>>
>> Good luck!
>>
>>
>> Daniel
>>
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>> openwrt-devel@lists.openwrt.org
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--
Jon Smirl
jonsm...@gmail.com
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