Hello Florian,

I've refreshed the patches, Miguel GAIO have sent you a patch also a few weeks ago (warning fixes, move spi registers functions inside the driver), you have to apply this one after mines.

Thanks,
Tanguy.

Le 28/12/2010 00:26, Florian Fainelli a écrit :
Hello Tanguy,

On Thursday 25 November 2010 10:37:04 Tanguy Bouzéloc wrote:
Hi Florian,

Il joined you a bcm63xx-spi fix for multibytes reads/writes.
I tried to apply all the patches that you submitted so far:

0001-fix-platform-device-registration.patch
0001-fix-chipselect-command-register-defines-add-missing-.patch
0002-make-slave-select-proper.patch
0003-fix-multibytes-transferts.patch

but they no longer apply cleanly. Can you refresh them and resubmit them? I
will be quicker in applying them this time ;)

Thanks a lot!
--
Florian


Regards,
Tanguy Bouzéloc.

Le 18/11/2010 16:46, Florian Fainelli a écrit :
Hello Tanguy,

On Thursday 18 November 2010 16:24:32 Tanguy Bouzéloc wrote:
Hi Florian,

I've updated the spi driver, it fixes the following issues :

- chipselect
- command register defines
- add missing clock
The patch looks good, however, you have put some BCM6358 specific code in
the generic driver, can you change the driver to add a platform_data
callback doning what you want for instance?
--
Florian

From 53dd92d48861b822aae8264fa7af1a3b02c5603c Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Tanguy=20Bouz=C3=A9loc?= <tanguy.bouze...@efixo.com>
Date: Mon, 18 Oct 2010 16:41:44 +0200
Subject: [PATCH 14/22] fix platform device registration

---
 target/linux/brcm63xx/patches-2.6.35/240-spi.patch |   12 ++++++------
 1 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/target/linux/brcm63xx/patches-2.6.35/240-spi.patch 
b/target/linux/brcm63xx/patches-2.6.35/240-spi.patch
index 4661486..ed35e36 100644
--- a/target/linux/brcm63xx/patches-2.6.35/240-spi.patch
+++ b/target/linux/brcm63xx/patches-2.6.35/240-spi.patch
@@ -982,13 +982,13 @@
  #include <board_bcm963xx.h>
  
  #define PFX   "board_bcm963xx: "
-@@ -1489,6 +1490,9 @@ void __init board_prom_init(void)
- 
-       bcm_gpio_writel(val, GPIO_MODE_REG);
+@@ -1596,6 +1597,9 @@ int __init board_register_devices(void)
+       if (board.num_spis)
+               spi_register_board_info(board.spis, board.num_spis);
  
 +      if (!BCMCPU_IS_6345())
 +              bcm63xx_spi_register();
 +
-       /* Generate MAC address for WLAN and
-        * register our SPROM */
- #ifdef CONFIG_SSB_PCIHOST
+       /* read base address of boot chip select (0) */
+       if (BCMCPU_IS_6345())
+               val = 0x1fc00000;
-- 
1.7.3.4

From e99254247409e97b8976221517ef65419389d887 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Tanguy=20Bouz=C3=A9loc?= <tanguy.bouze...@efixo.com>
Date: Thu, 18 Nov 2010 16:19:17 +0100
Subject: [PATCH 20/22] fix chipselect, command register defines, add missing 
clock

---
 target/linux/brcm63xx/patches-2.6.35/240-spi.patch |   30 +++++++++++++------
 1 files changed, 20 insertions(+), 10 deletions(-)

diff --git a/target/linux/brcm63xx/patches-2.6.35/240-spi.patch 
b/target/linux/brcm63xx/patches-2.6.35/240-spi.patch
index ed35e36..c2dc79c 100644
--- a/target/linux/brcm63xx/patches-2.6.35/240-spi.patch
+++ b/target/linux/brcm63xx/patches-2.6.35/240-spi.patch
@@ -122,7 +122,7 @@
 +
 +static struct bcm63xx_spi_pdata spi_pdata = {
 +      .bus_num                = 0,
-+      .num_chipselect         = 8,
++      .num_chipselect         = 4,
 +      .speed_hz               = 50000000,     /* Fclk */
 +};
 +
@@ -273,10 +273,10 @@
 +#define SPI_MSG_TYPE_SHIFT            14
 +
 +/* Command */
-+#define SPI_CMD_NOOP                  0x01
-+#define SPI_CMD_SOFT_RESET            0x02
-+#define SPI_CMD_HARD_RESET            0x04
-+#define SPI_CMD_START_IMMEDIATE               0x08
++#define SPI_CMD_NOOP                  0x00
++#define SPI_CMD_SOFT_RESET            0x01
++#define SPI_CMD_HARD_RESET            0x02
++#define SPI_CMD_START_IMMEDIATE               0x03
 +#define SPI_CMD_COMMAND_SHIFT         0
 +#define SPI_CMD_COMMAND_MASK          0x000f
 +#define SPI_CMD_DEVICE_ID_SHIFT               4
@@ -318,7 +318,7 @@
  #endif /* BCM63XX_REGS_H_ */
 --- /dev/null
 +++ b/drivers/spi/bcm63xx_spi.c
-@@ -0,0 +1,479 @@
+@@ -0,0 +1,489 @@
 +/*
 + * Broadcom BCM63xx SPI controller support
 + *
@@ -418,13 +418,13 @@
 +      case 32:
 +              clk_cfg = SPI_CLK_1_563MHZ;
 +              break;
-+      case 128:
++      case 64:
 +              clk_cfg = SPI_CLK_0_781MHZ;
 +              break;
-+      case 64:
++      case 128:
 +      default:
 +              /* Set to slowest mode for compatibility */
-+              clk_cfg = SPI_CLK_0_781MHZ;
++              clk_cfg = SPI_CLK_0_391MHZ;
 +              break;
 +      }
 +
@@ -527,6 +527,7 @@
 +      /* Issue the transfer */
 +      cmd = SPI_CMD_START_IMMEDIATE;
 +      cmd |= (0 << SPI_CMD_PREPEND_BYTE_CNT_SHIFT);
++      cmd |= (spi->chip_select << SPI_CMD_DEVICE_ID_SHIFT);
 +      bcm_spi_writew(cmd, SPI_CMD);
 +      wait_for_completion(&bs->done);
 +
@@ -620,6 +621,7 @@
 +      struct spi_master *master;
 +      struct clk *clk;
 +      struct bcm63xx_spi *bs;
++      uint32_t reg;
 +      int ret;
 +
 +      r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -699,6 +701,14 @@
 +              goto out_reset_hw;
 +      }
 +
++      reg = bcm_gpio_readl(GPIO_MODE_REG);
++      reg |= GPIO_MODE_6358_EXTRA_SPI_SS;
++      bcm_gpio_writel(reg, GPIO_MODE_REG);
++
++      reg = bcm_gpio_readl(GPIO_CTL_HI_REG);
++      reg |= 0x3;
++      bcm_gpio_writel(reg, GPIO_CTL_HI_REG);
++
 +      dev_info(dev, "at 0x%08x (irq %d, FIFOs size %d) v%s\n",
 +               r->start, irq, bs->fifo_size, DRV_VER);
 +
@@ -982,7 +992,7 @@
  #include <board_bcm963xx.h>
  
  #define PFX   "board_bcm963xx: "
-@@ -1596,6 +1597,9 @@ int __init board_register_devices(void)
+@@ -1602,6 +1603,9 @@ int __init board_register_devices(void)
        if (board.num_spis)
                spi_register_board_info(board.spis, board.num_spis);
  
-- 
1.7.3.4

From caa76314f534b3dc5fffa5ef703f5c110158e173 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Tanguy=20Bouz=C3=A9loc?= <tanguy.bouze...@efixo.com>
Date: Tue, 23 Nov 2010 15:57:08 +0100
Subject: [PATCH 21/22] make slave select proper

---
 target/linux/brcm63xx/patches-2.6.35/240-spi.patch |  107 +++++++++++++++++---
 1 files changed, 93 insertions(+), 14 deletions(-)

diff --git a/target/linux/brcm63xx/patches-2.6.35/240-spi.patch 
b/target/linux/brcm63xx/patches-2.6.35/240-spi.patch
index c2dc79c..344b1b4 100644
--- a/target/linux/brcm63xx/patches-2.6.35/240-spi.patch
+++ b/target/linux/brcm63xx/patches-2.6.35/240-spi.patch
@@ -143,6 +143,8 @@
 +      spi_resources[0].end += RSET_SPI_SIZE - 1;
 +      spi_resources[1].start = bcm63xx_get_irq_number(IRQ_SPI);
 +
++      bcm63xx_spi_regs_init();
++
 +      /* Fill in platform data */
 +      if (BCMCPU_IS_6338() || BCMCPU_IS_6348())
 +              spi_pdata.fifo_size = SPI_BCM_6338_SPI_MSG_DATA_SIZE;
@@ -150,8 +152,6 @@
 +      if (BCMCPU_IS_6358())
 +              spi_pdata.fifo_size = SPI_BCM_6358_SPI_MSG_DATA_SIZE;
 +
-+      bcm63xx_spi_regs_init();
-+
 +      return platform_device_register(&bcm63xx_spi_device);
 +}
 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
@@ -199,7 +199,15 @@
  #define BCM_6358_OHCI0_IRQ            (IRQ_INTERNAL_BASE + 5)
 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
 +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -769,4 +769,116 @@
+@@ -403,7 +403,6 @@
+ #define GPIO_MODE_6358_SERIAL_LED     (1 << 10)
+ #define GPIO_MODE_6358_UTOPIA         (1 << 12)
+ 
+-
+ /*************************************************************************
+  * _REG relative to RSET_ENET
+  *************************************************************************/
+@@ -769,4 +768,116 @@
  #define DMIPSPLLCFG_N2_SHIFT          29
  #define DMIPSPLLCFG_N2_MASK           (0x7 << DMIPSPLLCFG_N2_SHIFT)
  
@@ -318,7 +326,7 @@
  #endif /* BCM63XX_REGS_H_ */
 --- /dev/null
 +++ b/drivers/spi/bcm63xx_spi.c
-@@ -0,0 +1,489 @@
+@@ -0,0 +1,480 @@
 +/*
 + * Broadcom BCM63xx SPI controller support
 + *
@@ -621,7 +629,6 @@
 +      struct spi_master *master;
 +      struct clk *clk;
 +      struct bcm63xx_spi *bs;
-+      uint32_t reg;
 +      int ret;
 +
 +      r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -701,14 +708,6 @@
 +              goto out_reset_hw;
 +      }
 +
-+      reg = bcm_gpio_readl(GPIO_MODE_REG);
-+      reg |= GPIO_MODE_6358_EXTRA_SPI_SS;
-+      bcm_gpio_writel(reg, GPIO_MODE_REG);
-+
-+      reg = bcm_gpio_readl(GPIO_CTL_HI_REG);
-+      reg |= 0x3;
-+      bcm_gpio_writel(reg, GPIO_CTL_HI_REG);
-+
 +      dev_info(dev, "at 0x%08x (irq %d, FIFOs size %d) v%s\n",
 +               r->start, irq, bs->fifo_size, DRV_VER);
 +
@@ -992,7 +991,76 @@
  #include <board_bcm963xx.h>
  
  #define PFX   "board_bcm963xx: "
-@@ -1602,6 +1603,9 @@ int __init board_register_devices(void)
+@@ -817,6 +818,8 @@ static struct board_info __initdata boar
+       .has_enet0                      = 1,
+       .has_enet1                      = 1,
+       .has_pci                        = 1,
++      .has_extspi0                    = 1,
++      .has_extspi1                    = 1,
+ 
+       .enet0 = {
+               .has_phy                = 1,
+@@ -912,6 +915,7 @@ static struct board_info __initdata boar
+       .has_enet0                      = 1,
+       .has_enet1                      = 1,
+       .has_pci                        = 1,
++      .has_extspi1                    = 1,
+ 
+       .enet0 = {
+               .has_phy                = 1,
+@@ -1007,6 +1011,8 @@ static struct board_info __initdata boar
+       .has_enet0                      = 1,
+       .has_enet1                      = 1,
+       .has_pci                        = 1,
++      .has_extspi0                    = 1,
++      .has_extspi1                    = 1,
+ 
+       .enet0 = {
+               .has_phy                = 1,
+@@ -1100,6 +1106,8 @@ static struct board_info __initdata boar
+       .has_enet0                      = 1,
+       .has_enet1                      = 1,
+       .has_pci                        = 1,
++      .has_extspi0                    = 1,
++      .has_extspi1                    = 1,
+ 
+       .enet0 = {
+               .has_phy                = 1,
+@@ -1190,6 +1198,7 @@ static struct board_info __initdata boar
+       .has_enet0                      = 1,
+       .has_enet1                      = 1,
+       .has_pci                        = 1,
++      .has_extspi1                    = 1,
+ 
+       .enet0 = {
+               .has_phy                = 1,
+@@ -1493,8 +1502,25 @@ void __init board_prom_init(void)
+                               GPIO_MODE_6348_G0_EXT_MII;
+       }
+ 
++      if (BCMCPU_IS_6358())
++              val |= GPIO_MODE_6358_EXTRA_SPI_SS;
++
+       bcm_gpio_writel(val, GPIO_MODE_REG);
+ 
++      if (board.has_extspi0) {
++              if (gpio_request(32, "extspi0"))
++                      printk(KERN_ERR PFX "extspi0 gpio error");
++              else
++                      gpio_direction_output(32, 1);
++      }
++
++      if (board.has_extspi1) {
++              if (gpio_request(33, "extspi1"))
++                      printk(KERN_ERR PFX "extspi1 gpio error");
++              else
++                      gpio_direction_output(33, 1);
++      }
++
+       /* Generate MAC address for WLAN and
+        * register our SPROM */
+ #ifdef CONFIG_SSB_PCIHOST
+@@ -1602,6 +1628,9 @@ int __init board_register_devices(void)
        if (board.num_spis)
                spi_register_board_info(board.spis, board.num_spis);
  
@@ -1002,3 +1070,14 @@
        /* read base address of boot chip select (0) */
        if (BCMCPU_IS_6345())
                val = 0x1fc00000;
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -48,6 +48,8 @@ struct board_info {
+       unsigned int    has_uart0:1;
+       unsigned int    has_uart1:1;
+       unsigned int    has_udc0:1;
++      unsigned int    has_extspi0:1;
++      unsigned int    has_extspi1:1;
+ 
+       /* ethernet config */
+       struct bcm63xx_enet_platform_data enet0;
-- 
1.7.3.4

From ab66b05d6f5e01feedec2c4a918bc20eb08b34dd Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Tanguy=20Bouz=C3=A9loc?= <tanguy.bouze...@efixo.com>
Date: Wed, 24 Nov 2010 17:47:01 +0100
Subject: [PATCH 22/22] fix multibytes transferts

---
 target/linux/brcm63xx/patches-2.6.35/240-spi.patch |   40 ++++++++------------
 1 files changed, 16 insertions(+), 24 deletions(-)

diff --git a/target/linux/brcm63xx/patches-2.6.35/240-spi.patch 
b/target/linux/brcm63xx/patches-2.6.35/240-spi.patch
index 344b1b4..ff607cd 100644
--- a/target/linux/brcm63xx/patches-2.6.35/240-spi.patch
+++ b/target/linux/brcm63xx/patches-2.6.35/240-spi.patch
@@ -326,7 +326,7 @@
  #endif /* BCM63XX_REGS_H_ */
 --- /dev/null
 +++ b/drivers/spi/bcm63xx_spi.c
-@@ -0,0 +1,480 @@
+@@ -0,0 +1,472 @@
 +/*
 + * Broadcom BCM63xx SPI controller support
 + *
@@ -346,7 +346,7 @@
 + * along with this program; if not, write to the
 + * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
 + */
-+
++#define DEBUG
 +#include <linux/kernel.h>
 +#include <linux/init.h>
 +#include <linux/clk.h>
@@ -378,6 +378,11 @@
 +      /* Data buffers */
 +      const unsigned char     *tx_ptr;
 +      unsigned char           *rx_ptr;
++
++      /* data iomem */
++      volatile unsigned char       *tx_io;
++      const volatile unsigned char *rx_io;
++
 +      int                     remaining_bytes;
 +
 +      struct clk              *clk;
@@ -481,20 +486,13 @@
 +/* Fill the TX FIFO with as many bytes as possible */
 +static void bcm63xx_spi_fill_tx_fifo(struct bcm63xx_spi *bs)
 +{
-+        u8 tail;
++      u8 size;
 +
 +        /* Fill the Tx FIFO with as many bytes as possible */
-+      tail = bcm_spi_readb(SPI_MSG_TAIL);
-+
-+        while ((tail < bs->fifo_size) && (bs->remaining_bytes > 0)) {
-+                if (bs->tx_ptr)
-+                        bcm_spi_writeb(*bs->tx_ptr++, SPI_MSG_DATA);
-+              else
-+                      bcm_spi_writeb(0, SPI_MSG_DATA);
-+
-+                bs->remaining_bytes--;
-+              tail = bcm_spi_readb(SPI_MSG_TAIL);
-+        }
++      size = bs->remaining_bytes < bs->fifo_size ? bs->remaining_bytes :
++              bs->fifo_size;
++      memcpy(bs->tx_io, bs->tx_ptr, size);
++      bs->remaining_bytes -= size;
 +}
 +
 +static int bcm63xx_txrx_bufs(struct spi_device *spi, struct spi_transfer *t)
@@ -588,16 +586,8 @@
 +              rx_tail = bcm_spi_readb(SPI_RX_TAIL);
 +
 +              /* Read out all the data */
-+              if (rx_tail) {
-+                      u8 data;
-+                      u8 i = 0;
-+
-+                      for(i = 0; i < rx_tail; i++) {
-+                              data = bcm_spi_readb(SPI_RX_DATA);
-+                              if (bs->rx_ptr)
-+                                      *bs->rx_ptr++ = data;
-+                      }
-+              }
++              if (rx_tail)
++                      memcpy(bs->rx_ptr, bs->rx_io, rx_tail);
 +
 +              /* See if there is more data to send */
 +              if (bs->remaining_bytes > 0) {
@@ -695,6 +685,8 @@
 +      master->transfer = bcm63xx_transfer;
 +      bs->speed_hz = pdata->speed_hz;
 +      bs->stopping = 0;
++      bs->tx_io = bcm63xx_regset_address(RSET_SPI) + 
bcm63xx_spireg(SPI_MSG_DATA);
++      bs->rx_io = bcm63xx_regset_address(RSET_SPI) + 
bcm63xx_spireg(SPI_RX_DATA);
 +      spin_lock_init(&bs->lock);
 +
 +      /* Initialize hardware */
-- 
1.7.3.4

_______________________________________________
openwrt-devel mailing list
openwrt-devel@lists.openwrt.org
https://lists.openwrt.org/mailman/listinfo/openwrt-devel

Reply via email to