On Tue, May 10, 2011 at 5:33 PM, Sébastien Baillou <sbaillou.mail...@gmail.com> wrote: > Hello everyone, > > I am in the process of adding debugging support to one of my employer's DSP. > I came across OpenOCD and figured it would be a nice way of interfacing the > hardware with GDB, given the existing support of many JTAG adapters. > > The focus of my company is multi-core designs, which means the debugging > solution I come up with will need to be relatively scalable. > To do so, I envisioned an ICEpick like architecture (over IEEE 1149.1) that > would support adding and removing TAP controller at runtime. Thus shortening > the lengths of the chain and increasing the performance when debugging > dozens of cores. > > My concern is not so much regarding the hardware implementation (although I > am definitely still open to suggestions), but with OpenOCD's support of > multicore systems. > > 1- Currently, multiple CPUs are connected to the GDB clients via multiple > GDB servers and not via GDB threads. Is the addition of a threaded GDB > server planned in any roadmap ?
There is already some smp support in there, you may want to have a look at that. Using threads has been discussed, but I think the model would break down with MMUs. That said for DSP's it could be a good model if they don't have MMUs. The OpenOCD maintainers would gladly accept well worked out patches in this area! > 2- I read in the documentation that "In OpenOCD, tap enabling/disabling is > invoked by the Tcl commands shown below, and is implemented using TAP event > handlers." > I first thought I would be able to : > - Connect N gdb clients to OpenOCD. > - Wait for a request from a gdb client. > - Then add the relevant TAP to the JTAG chain, perform the requested > operation and remove the TAP from the chain. > > I assume this needs to be implemented within the target C files of OpenOCD. > However, I am under the impression that the target layer is only aware of > the existence of its own TAP controller. Which means no direct access to the > Master TAP, and therefore no ability to add/remove TAPs. Is that correct ? Look at Cortex A implementation. It currently operates with a concept of a "master tap" common to all cores. > If so, could you suggest a way of supporting this behavior with OpenOCD ? This is a sizable amount of work and would require somebody to do it as part of their day-time job I think. -- Øyvind Harboe Can Zylin Consulting help on your project? US toll free 1-866-980-3434 / International +47 51 87 40 27 http://www.zylin.com/zy1000.html ARM7 ARM9 ARM11 XScale Cortex JTAG debugger and flash programmer _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development