>> +# The chip may run @ 32khz, so set a really low JTAG speed >> +adapter_khz 8 > this is the wrong place it's not board specific but soc specific > > tcl/target/at91rm9200.cfg
Perhaps jtag_rclk 8 should be used, i.e. use RCLK if it is supported and fall back to 8 khz. Of course post reset init jtag_rclk's fallback frequency could be increased. I think in some ways the speed does belong in the board as they could let be of bringing out rclk on the JTAG connector and perhaps the board only "supports" or rather works with a lower frequency that what the part could do. Certainly the target script could have a default jtag_rclk 8, I suppose. Patches gladly accepted! -- Øyvind Harboe Can Zylin Consulting help on your project? US toll free 1-866-980-3434 / International +47 51 87 40 27 http://www.zylin.com/zy1000.html ARM7 ARM9 ARM11 XScale Cortex JTAG debugger and flash programmer _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development