Hello, On 07.02.2011 03:54, Aaron Carroll wrote:
On A8/omap35xx and A9/omap44xx, the CPU CoreSight component is on AP 0 (an APB-AP). However, for both these platforms we do memory accesses on AP 1, which is an AHB-AP. One advantage of this is the core does not need to be halted to access memory. The upshot is that we do need to switch between AP's. I agree that this should be abstracted somehow, but in the mean time A9 is broken :)
So we need one AP to control the DP and a second AP for all the MEM-AP read/write functions. I think this can be done completely in arm_di_v5.c/.h. Is this is done we no longer need to use the dap_ap_select function in the higher layers.
Regards, Mathias _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
