Jon Masters wrote: > Oh, on a randomly off-topic engineering note, I'd love to know why the > Flyswatter contains component Q1 (the NPN transistor) so that to do a > system reset you don't just pull nSRST low but actually set A_nSRST high > and have that go into Q1, which results in pulling system reset low > indirectly. Is this because we might end up sinking a lot of current? > Does anyone with an EE/circuit design background happen to know?
It's not so much about current as it is about voltage. The chip driving the transistor only has to provide a high enough voltage to saturate the NPN. This is fairly easy with any digital chip. In return, the transistor effectively acts as an open collector output, which will accept a wide range of voltage levels, according to the transistor data, and can still pull the signal to GND when the transistor is saturated. With a good choice of transistor the driving chip can be 3V3 and the driven /SRST signal can be much much lower. I think this is what Flyswatter does. //Peter _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
