The MC13224V is a FreeScale ARM7TDMI based IEEE® 802.15.4 platform for Zigbee and similar low-power wireless applications. Using PIP (Platform In Package) technology, it integrates: an RF balun and matching network; a buck converter (only an external inductor is necessary); 96KB of SRAM; and 128KB of non-volatile memory.
It has an integrated bootloader and can boot from a variety of sources: external SPI or I2C non-volatile memory, an image loaded over UART1, or the internal non-volatile memory. The image loaded from one of these sources is executed directly from SRAM starting at location 0x00400000. Additional features are: - -100dBm receiver sensitivity; +4dBm transmit power - interface for off-board LNA and PA. - low sleep current (<2.0uA) - flexible sleep configurations (optionally retain 4 sizes of RAM; CPU state; GPIO state) - 64 GPIO pins - Onboard 2kHz wake-up timer - Optional 32.678kHz crystal driver - 2x UARTs - AES 128-bit engine - 2x 12-bit ADC on shared 8 channels - 4x 16-bit timers with PWM - I2C, SPI, and SSI interfaces. - 4x asynchronous interrupt inputs Open source development code at http://mc1322x.devl.org --- tcl/target/mc13224v.cfg | 54 +++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 54 insertions(+), 0 deletions(-) create mode 100644 tcl/target/mc13224v.cfg diff --git a/tcl/target/mc13224v.cfg b/tcl/target/mc13224v.cfg new file mode 100644 index 0000000..09387a3 --- /dev/null +++ b/tcl/target/mc13224v.cfg @@ -0,0 +1,54 @@ +source [find bitsbytes.tcl] +source [find cpu/arm/arm7tdmi.tcl] +source [find memory.tcl] +source [find mmr_helpers.tcl] +set CHIP_MAKER freescale +set CHIP_FAMILY mc1322x +set CHIP_NAME mc13224 +set N_RAM 1 +set RAM(0,BASE) 0x00400000 +set RAM(0,LEN) 0x18000 +set RAM(0,HUMAN) "internal SRAM" +set RAM(0,TYPE) "ram" +set RAM(0,RWX) $RWX_RWX +set RAM(0,ACCESS_WIDTH) $ACCESS_WIDTH_ANY + +# I AM LAZY... I create 1 region for all MMRs. +set N_MMREGS 1 +set MMREGS(0,CHIPSELECT) -1 +set MMREGS(0,BASE) 0x80000000 +set MMREGS(0,LEN) 0x00030000 +set MMREGS(0,HUMAN) "mm-regs" +set MMREGS(0,TYPE) "mmr" +set MMREGS(0,RWX) $RWX_RW +set MMREGS(0,ACCESS_WIDTH) $ACCESS_WIDTH_ANY + +set N_XMEM 0 + +set _CHIPNAME mc13224v +set _ENDIAN little +set _CPUTAPID 0x1f1f001d + +jtag newtap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID + +reset_config srst_only +jtag_ntrst_delay 200 + +# rclk hasn't been working well. This maybe the mc13224v or something else. +#jtag_rclk 2000 +jtag_khz 2000 + +###################### +# Target configuration +###################### + +set _TARGETNAME [format "%s.cpu" $_CHIPNAME] +target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME + +# Internal sram memory +$_TARGETNAME configure -work-area-phys 0x00408000 \ + -work-area-size 0x1000 \ + -work-area-backup 1 + +# flash support is pending (should be straightforward to implement) +#flash bank mc1322x 0 0 0 0 $_TARGETNAME -- 1.5.6.5 _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
