On Tuesday 16 February 2010, Marc Pignat wrote:
> If I understand the arm920t TRM well, there is no way to flush something using
> the JTAG interface (only invalidate),so support for data cache in write back
> mode will be difficult.
Not using scanchain 15 operations, no.
But I don't think there's any particular reason the generic ARM9
"execute this instruction" logic wouldn't be able to execute those
opcodes. It's a bit more trouble -- you'd have to stuff some
register with the MVA of the line to flush, and (easy) make sure
that register is properly restored later.
Another option of course is to
- first invalidate the line(s) you'll be writing
- then disable the cache,
- write
- re-enable the cache
So the data never ends up in the cache, and flushing isn't needed.
- Dave
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