There's the test run. At address 0x08000000, according to flash info 0, there should be the flash. The RAM is at 0x20000000. You can see that it fails to read the flash, but it manages to read the RAM just fine:
$ sudo src/openocd -f /home/edgar/workspace/openocd/tcl/interface/parport.cfg -f /home/edgar/workspace/openocd/tcl/target/stm32.cfg -d3 -llog.txt > reset init JTAG tap: stm32.cpu tap/device found: 0x3ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x3) JTAG tap: stm32.bs tap/device found: 0x16410041 (mfg: 0x020, part: 0x6410, ver: 0x1) target state: halted target halted due to debug-request, current mode: Handler HardFault xPSR: 0x01000003 pc: 0xfffffffe msp: 0xffffffdc > mdw 0x08000000 32 JTAG-DP STICKY ERROR MEM_AP_CSW 0x23000052, MEM_AP_TAR 0x8000004 JTAG-DP STICKY ERROR MEM_AP_CSW 0x23000052, MEM_AP_TAR 0x8000004 Block read error address 0x8000000, count 0x20 Command handler execution failed in procedure 'mdw' called at file "command.c", line 650 called at file "command.c", line 361 > mdw 0x20000000 32 0x20000000: deadbabe deadbabe deadbabe deadbabe deadbabe deadbabe deadbabe deadbabe 0x20000020: deadbabe deadbabe deadbabe deadbabe deadbabe deadbabe deadbabe deadbabe 0x20000040: deadbabe deadbabe deadbabe deadbabe deadbabe deadbabe deadbabe deadbabe 0x20000060: deadbabe deadbabe deadbabe deadbabe deadbabe deadbabe deadbabe deadbabe The log is attached. I get the same result if I try to mdw 0 32. Regards, Edgar -- Edgar Grimberg System Developer Zylin AS Visit us at Embedded World, March 2nd-4th. IS2T's stand, HALL 10 - 118 http://www.zylin.com/events_embeddedworld.html ZY1000 JTAG Debugger http://www.zylin.com/zy1000.html Phone: (+47) 51 63 25 00
Debug: 14 2 configuration.c:45 add_script_search_dir(): adding /home/edgar/.openocd Debug: 15 2 configuration.c:45 add_script_search_dir(): adding /usr/local/share/openocd/site Debug: 16 2 configuration.c:45 add_script_search_dir(): adding /usr/local/share/openocd/scripts Debug: 17 2 configuration.c:87 find_file(): found /home/edgar/workspace/openocd/tcl/interface/parport.cfg Debug: 18 2 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_interface parport Debug: 19 2 command.c:133 script_debug(): command - interface ocd_interface parport Debug: 21 2 command.c:346 register_command_handler(): registering 'ocd_parport_port'... Debug: 22 2 command.c:346 register_command_handler(): registering 'ocd_parport_cable'... Debug: 23 2 command.c:346 register_command_handler(): registering 'ocd_parport_write_on_exit'... Debug: 24 2 command.c:346 register_command_handler(): registering 'ocd_parport_toggling_time'... Debug: 25 2 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_parport_port 0x378 Debug: 26 2 command.c:133 script_debug(): command - parport_port ocd_parport_port 0x378 User : 28 2 command.c:539 command_print(): parport port = 0x378 Debug: 29 2 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_parport_cable wiggler Debug: 30 2 command.c:133 script_debug(): command - parport_cable ocd_parport_cable wiggler Debug: 32 2 configuration.c:87 find_file(): found /home/edgar/workspace/openocd/tcl/target/stm32.cfg Debug: 33 3 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_jtag_khz 1000 Debug: 34 3 command.c:133 script_debug(): command - jtag_khz ocd_jtag_khz 1000 Debug: 36 3 core.c:1560 jtag_config_khz(): handle jtag khz Debug: 37 3 core.c:1523 jtag_khz_to_speed(): convert khz to interface specific speed value User : 38 3 command.c:539 command_print(): 1000 kHz Debug: 39 3 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_jtag_nsrst_delay 100 Debug: 40 3 command.c:133 script_debug(): command - jtag_nsrst_delay ocd_jtag_nsrst_delay 100 User : 42 3 command.c:539 command_print(): jtag_nsrst_delay: 100 Debug: 43 3 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_jtag_ntrst_delay 100 Debug: 44 3 command.c:133 script_debug(): command - jtag_ntrst_delay ocd_jtag_ntrst_delay 100 User : 46 3 command.c:539 command_print(): jtag_ntrst_delay: 100 Debug: 47 3 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_jtag newtap stm32 cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0x3ba00477 Debug: 48 3 command.c:133 script_debug(): command - ocd_jtag ocd_jtag newtap stm32 cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0x3ba00477 Debug: 49 3 tcl.c:568 jim_newtap_cmd(): Creating New Tap, Chip: stm32, Tap: cpu, Dotted: stm32.cpu, 8 params Debug: 50 3 tcl.c:585 jim_newtap_cmd(): Processing option: -irlen Debug: 51 3 tcl.c:585 jim_newtap_cmd(): Processing option: -ircapture Debug: 52 3 tcl.c:585 jim_newtap_cmd(): Processing option: -irmask Debug: 53 3 tcl.c:585 jim_newtap_cmd(): Processing option: -expected-id Debug: 54 3 core.c:1300 jtag_tap_init(): Created Tap: stm32.cpu @ abs position 0, irlen 4, capture: 0x1 mask: 0xf Debug: 55 3 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_jtag newtap stm32 bs -irlen 5 -expected-id 0x06412041 -expected-id 0x06410041 -expected-id 0x16410041 -expected-id 0x06414041 -expected-id 0x06418041 Debug: 56 3 command.c:133 script_debug(): command - ocd_jtag ocd_jtag newtap stm32 bs -irlen 5 -expected-id 0x06412041 -expected-id 0x06410041 -expected-id 0x16410041 -expected-id 0x06414041 -expected-id 0x06418041 Debug: 57 3 tcl.c:568 jim_newtap_cmd(): Creating New Tap, Chip: stm32, Tap: bs, Dotted: stm32.bs, 12 params Debug: 58 3 tcl.c:585 jim_newtap_cmd(): Processing option: -irlen Debug: 59 3 tcl.c:585 jim_newtap_cmd(): Processing option: -expected-id Debug: 60 3 tcl.c:585 jim_newtap_cmd(): Processing option: -expected-id Debug: 61 3 tcl.c:585 jim_newtap_cmd(): Processing option: -expected-id Debug: 62 3 tcl.c:585 jim_newtap_cmd(): Processing option: -expected-id Debug: 63 3 tcl.c:585 jim_newtap_cmd(): Processing option: -expected-id Debug: 64 3 core.c:1300 jtag_tap_init(): Created Tap: stm32.bs @ abs position 0, irlen 5, capture: 0x1 mask: 0x3 Debug: 65 3 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_target create stm32.cpu cortex_m3 -endian little -chain-position stm32.cpu Debug: 66 3 command.c:133 script_debug(): command - ocd_target ocd_target create stm32.cpu cortex_m3 -endian little -chain-position stm32.cpu Debug: 67 3 command.c:346 register_command_handler(): registering 'ocd_dap'... Debug: 68 3 command.c:346 register_command_handler(): registering 'ocd_dap'... Debug: 69 3 command.c:346 register_command_handler(): registering 'ocd_dap'... Debug: 70 3 command.c:346 register_command_handler(): registering 'ocd_dap'... Debug: 71 3 command.c:346 register_command_handler(): registering 'ocd_dap'... Debug: 72 3 command.c:346 register_command_handler(): registering 'ocd_cortex_m3'... Debug: 73 3 command.c:346 register_command_handler(): registering 'ocd_cortex_m3'... Debug: 74 3 command.c:346 register_command_handler(): registering 'ocd_cortex_m3'... Debug: 75 3 command.c:346 register_command_handler(): registering 'ocd_stm32.cpu'... Debug: 76 3 command.c:346 register_command_handler(): registering 'ocd_stm32.cpu'... Debug: 77 3 command.c:346 register_command_handler(): registering 'ocd_stm32.cpu'... Debug: 78 3 command.c:346 register_command_handler(): registering 'ocd_stm32.cpu'... Debug: 79 3 command.c:346 register_command_handler(): registering 'ocd_stm32.cpu'... Debug: 80 3 command.c:346 register_command_handler(): registering 'ocd_stm32.cpu'... Debug: 81 3 command.c:346 register_command_handler(): registering 'ocd_stm32.cpu'... Debug: 82 3 command.c:346 register_command_handler(): registering 'ocd_stm32.cpu'... Debug: 83 3 command.c:346 register_command_handler(): registering 'ocd_stm32.cpu'... Debug: 84 4 command.c:346 register_command_handler(): registering 'ocd_stm32.cpu'... Debug: 85 4 command.c:346 register_command_handler(): registering 'ocd_stm32.cpu'... Debug: 86 4 command.c:346 register_command_handler(): registering 'ocd_stm32.cpu'... Debug: 87 4 command.c:346 register_command_handler(): registering 'ocd_stm32.cpu'... Debug: 88 4 command.c:346 register_command_handler(): registering 'ocd_stm32.cpu'... Debug: 89 4 command.c:346 register_command_handler(): registering 'ocd_stm32.cpu'... Debug: 90 4 command.c:346 register_command_handler(): registering 'ocd_stm32.cpu'... Debug: 91 4 command.c:346 register_command_handler(): registering 'ocd_stm32.cpu'... Debug: 92 4 command.c:346 register_command_handler(): registering 'ocd_stm32.cpu'... Debug: 93 4 command.c:346 register_command_handler(): registering 'ocd_stm32.cpu'... Debug: 94 4 command.c:346 register_command_handler(): registering 'ocd_stm32.cpu'... Debug: 95 4 command.c:346 register_command_handler(): registering 'ocd_stm32.cpu'... Debug: 96 4 command.c:346 register_command_handler(): registering 'ocd_stm32.cpu'... Debug: 97 4 command.c:346 register_command_handler(): registering 'ocd_stm32.cpu'... Debug: 98 4 command.c:346 register_command_handler(): registering 'ocd_stm32.cpu'... Debug: 99 4 command.c:346 register_command_handler(): registering 'ocd_stm32.cpu'... Debug: 100 4 command.c:346 register_command_handler(): registering 'ocd_stm32.cpu'... Debug: 101 4 command.c:346 register_command_handler(): registering 'ocd_stm32.cpu'... Debug: 102 4 command.c:346 register_command_handler(): registering 'ocd_stm32.cpu'... Debug: 103 4 command.c:346 register_command_handler(): registering 'ocd_stm32.cpu'... Debug: 104 4 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_stm32.cpu configure -work-area-phys 0x20000000 -work-area-size 0x4000 -work-area-backup 0 Debug: 105 4 command.c:133 script_debug(): command - ocd_stm32.cpu ocd_stm32.cpu configure -work-area-phys 0x20000000 -work-area-size 0x4000 -work-area-backup 0 Debug: 106 4 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_flash bank stm32.flash stm32x 0 0 0 0 stm32.cpu Debug: 107 4 command.c:133 script_debug(): command - ocd_flash ocd_flash bank stm32.flash stm32x 0 0 0 0 stm32.cpu Debug: 109 4 command.c:346 register_command_handler(): registering 'ocd_stm32x'... Debug: 110 4 command.c:346 register_command_handler(): registering 'ocd_stm32x'... Debug: 111 4 command.c:346 register_command_handler(): registering 'ocd_stm32x'... Debug: 112 4 command.c:346 register_command_handler(): registering 'ocd_stm32x'... Debug: 113 4 command.c:346 register_command_handler(): registering 'ocd_stm32x'... Debug: 114 4 httpd_stubs.c:28 httpd_start(): libocdserver was built without HTTPD support Debug: 115 4 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_init Debug: 116 4 command.c:133 script_debug(): command - init ocd_init Debug: 118 4 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_target init Debug: 119 4 command.c:133 script_debug(): command - ocd_target ocd_target init Debug: 121 4 target.c:835 handle_target_init_command(): Initializing targets... Debug: 122 4 command.c:346 register_command_handler(): registering 'ocd_target_request'... Debug: 123 4 command.c:346 register_command_handler(): registering 'ocd_trace'... Debug: 124 4 command.c:346 register_command_handler(): registering 'ocd_trace'... Debug: 125 4 command.c:346 register_command_handler(): registering 'ocd_fast_load_image'... Debug: 126 4 command.c:346 register_command_handler(): registering 'ocd_fast_load'... Debug: 127 4 command.c:346 register_command_handler(): registering 'ocd_profile'... Debug: 128 4 command.c:346 register_command_handler(): registering 'ocd_virt2phys'... Debug: 129 4 command.c:346 register_command_handler(): registering 'ocd_reg'... Debug: 130 4 command.c:346 register_command_handler(): registering 'ocd_poll'... Debug: 131 4 command.c:346 register_command_handler(): registering 'ocd_wait_halt'... Debug: 132 4 command.c:346 register_command_handler(): registering 'ocd_halt'... Debug: 133 4 command.c:346 register_command_handler(): registering 'ocd_resume'... Debug: 134 4 command.c:346 register_command_handler(): registering 'ocd_reset'... Debug: 135 4 command.c:346 register_command_handler(): registering 'ocd_soft_reset_halt'... Debug: 136 4 command.c:346 register_command_handler(): registering 'ocd_step'... Debug: 137 5 command.c:346 register_command_handler(): registering 'ocd_mdw'... Debug: 138 5 command.c:346 register_command_handler(): registering 'ocd_mdh'... Debug: 139 5 command.c:346 register_command_handler(): registering 'ocd_mdb'... Debug: 140 5 command.c:346 register_command_handler(): registering 'ocd_mww'... Debug: 141 5 command.c:346 register_command_handler(): registering 'ocd_mwh'... Debug: 142 5 command.c:346 register_command_handler(): registering 'ocd_mwb'... Debug: 143 5 command.c:346 register_command_handler(): registering 'ocd_bp'... Debug: 144 5 command.c:346 register_command_handler(): registering 'ocd_rbp'... Debug: 145 5 command.c:346 register_command_handler(): registering 'ocd_wp'... Debug: 146 5 command.c:346 register_command_handler(): registering 'ocd_rwp'... Debug: 147 5 command.c:346 register_command_handler(): registering 'ocd_load_image'... Debug: 148 5 command.c:346 register_command_handler(): registering 'ocd_dump_image'... Debug: 149 5 command.c:346 register_command_handler(): registering 'ocd_verify_image'... Debug: 150 5 command.c:346 register_command_handler(): registering 'ocd_test_image'... Debug: 151 5 command.c:346 register_command_handler(): registering 'ocd_reset_nag'... Debug: 152 5 parport.c:360 parport_init(): requesting privileges for parallel port 0x378... Debug: 153 5 parport.c:370 parport_init(): ...privileges granted Debug: 154 5 parport.c:179 parport_reset(): trst: 0, srst: 0 Debug: 155 5 core.c:1523 jtag_khz_to_speed(): convert khz to interface specific speed value Debug: 156 5 core.c:1527 jtag_khz_to_speed(): have interface set up Debug: 157 5 core.c:1523 jtag_khz_to_speed(): convert khz to interface specific speed value Debug: 158 5 core.c:1527 jtag_khz_to_speed(): have interface set up Info : 159 5 core.c:1350 jtag_interface_init(): clock speed 500 kHz Debug: 160 5 openocd.c:122 handle_init_command(): jtag interface init complete Debug: 161 5 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_jtag init Debug: 162 5 command.c:133 script_debug(): command - ocd_jtag ocd_jtag init Debug: 164 5 tcl.c:854 handle_jtag_init_command(): Initializing jtag devices... Debug: 165 5 parport.c:179 parport_reset(): trst: 0, srst: 0 Debug: 166 5 core.c:672 jtag_add_reset(): SRST line released Debug: 167 5 core.c:697 jtag_add_reset(): TRST line released Debug: 168 5 core.c:321 jtag_call_event_callbacks(): jtag event: TAP reset Debug: 169 206 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_jtag arp_init Debug: 170 206 command.c:133 script_debug(): command - ocd_jtag ocd_jtag arp_init Debug: 171 206 core.c:1364 jtag_init_inner(): Init JTAG chain Debug: 172 206 core.c:321 jtag_call_event_callbacks(): jtag event: TAP reset Debug: 173 206 core.c:1017 jtag_examine_chain(): DR scan interrogation for IDCODE/BYPASS Debug: 174 206 core.c:321 jtag_call_event_callbacks(): jtag event: TAP reset Info : 175 209 core.c:917 jtag_examine_chain_display(): JTAG tap: stm32.cpu tap/device found: 0x3ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x3) Info : 176 209 core.c:917 jtag_examine_chain_display(): JTAG tap: stm32.bs tap/device found: 0x16410041 (mfg: 0x020, part: 0x6410, ver: 0x1) Debug: 177 209 core.c:1182 jtag_validate_ircapture(): IR capture validation scan Debug: 178 209 core.c:1243 jtag_validate_ircapture(): stm32.cpu: IR capture 0x01 Debug: 179 209 core.c:1243 jtag_validate_ircapture(): stm32.bs: IR capture 0x01 Debug: 180 209 openocd.c:132 handle_init_command(): Examining targets... Debug: 181 209 arm_adi_v5.c:1204 ahbap_debugport_init(): Debug: 182 213 arm_adi_v5.c:1265 ahbap_debugport_init(): MEM-AP #0 ID Register 0x14770011, Debug ROM Address 0xe00ff003 Debug: 183 214 target.c:1488 target_read_u32(): address: 0xe000ed00, value: 0x411fc231 Debug: 184 214 cortex_m3.c:1694 cortex_m3_examine(): Cortex-M3 r1p1 processor detected Debug: 185 214 cortex_m3.c:1695 cortex_m3_examine(): cpuid: 0x411fc231 Debug: 186 215 target.c:1488 target_read_u32(): address: 0xe0002000, value: 0x00000261 Debug: 187 215 cortex_m3.c:1712 cortex_m3_examine(): FPB fpcr 0x261, numcode 6, numlit 2 Debug: 188 215 target.c:1488 target_read_u32(): address: 0xe0001000, value: 0x40000000 Debug: 189 215 cortex_m3.c:1664 cortex_m3_dwt_setup(): DWT dwtcr 0x40000000, comp 4, watch/trigger Info : 190 215 cortex_m3.c:1721 cortex_m3_examine(): stm32.cpu: hardware has 6 breakpoints, 4 watchpoints Debug: 191 215 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_flash init Debug: 192 215 command.c:133 script_debug(): command - ocd_flash ocd_flash init Debug: 194 217 tcl.c:920 handle_flash_init_command(): Initializing flash devices... Debug: 195 217 command.c:346 register_command_handler(): registering 'ocd_flash'... Debug: 196 217 command.c:346 register_command_handler(): registering 'ocd_flash'... Debug: 197 217 command.c:346 register_command_handler(): registering 'ocd_flash'... Debug: 198 217 command.c:346 register_command_handler(): registering 'ocd_flash'... Debug: 199 217 command.c:346 register_command_handler(): registering 'ocd_flash'... Debug: 200 217 command.c:346 register_command_handler(): registering 'ocd_flash'... Debug: 201 217 command.c:346 register_command_handler(): registering 'ocd_flash'... Debug: 202 217 command.c:346 register_command_handler(): registering 'ocd_flash'... Debug: 203 217 command.c:346 register_command_handler(): registering 'ocd_flash'... Debug: 204 217 command.c:346 register_command_handler(): registering 'ocd_flash'... Debug: 205 217 command.c:346 register_command_handler(): registering 'ocd_flash'... Debug: 206 217 command.c:346 register_command_handler(): registering 'ocd_flash'... Debug: 207 217 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_mflash init Debug: 208 217 command.c:133 script_debug(): command - ocd_mflash ocd_mflash init Debug: 210 218 mflash.c:1325 handle_mflash_init_command(): Initializing mflash devices... Debug: 211 218 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_nand init Debug: 212 218 command.c:133 script_debug(): command - ocd_nand ocd_nand init Debug: 214 218 tcl.c:536 handle_nand_init_command(): Initializing NAND devices... Debug: 215 219 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_pld init Debug: 216 219 command.c:133 script_debug(): command - ocd_pld ocd_pld init Debug: 218 219 pld.c:231 handle_pld_init_command(): Initializing PLDs... Debug: 219 219 gdb_server.c:2370 gdb_target_start(): gdb service for target 'stm32.cpu' on TCP port 3333 Info : 220 27987 server.c:81 add_connection(): accepting 'telnet' connection from 0 Debug: 221 30920 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_reset init Debug: 222 30920 command.c:133 script_debug(): command - reset ocd_reset init Debug: 224 30921 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_target names Debug: 225 30921 command.c:133 script_debug(): command - ocd_target ocd_target names Debug: 226 30921 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_stm32.cpu invoke-event reset-start Debug: 227 30921 command.c:133 script_debug(): command - ocd_stm32.cpu ocd_stm32.cpu invoke-event reset-start Debug: 228 30921 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_jtag arp_init-reset Debug: 229 30921 command.c:133 script_debug(): command - ocd_jtag ocd_jtag arp_init-reset Debug: 230 30921 core.c:1451 jtag_init_reset(): Initializing with hard TRST+SRST reset Debug: 231 30921 core.c:685 jtag_add_reset(): JTAG reset with TLR instead of TRST Debug: 232 30921 core.c:321 jtag_call_event_callbacks(): jtag event: TAP reset Debug: 233 30921 core.c:1364 jtag_init_inner(): Init JTAG chain Debug: 234 30921 core.c:321 jtag_call_event_callbacks(): jtag event: TAP reset Debug: 235 30921 core.c:1017 jtag_examine_chain(): DR scan interrogation for IDCODE/BYPASS Debug: 236 30921 core.c:321 jtag_call_event_callbacks(): jtag event: TAP reset Info : 237 30924 core.c:917 jtag_examine_chain_display(): JTAG tap: stm32.cpu tap/device found: 0x3ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x3) Info : 238 30924 core.c:917 jtag_examine_chain_display(): JTAG tap: stm32.bs tap/device found: 0x16410041 (mfg: 0x020, part: 0x6410, ver: 0x1) Debug: 239 30924 core.c:1182 jtag_validate_ircapture(): IR capture validation scan Debug: 240 30924 core.c:1243 jtag_validate_ircapture(): stm32.cpu: IR capture 0x01 Debug: 241 30924 core.c:1243 jtag_validate_ircapture(): stm32.bs: IR capture 0x01 Debug: 242 30924 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_stm32.cpu cget -chain-position Debug: 243 30925 command.c:133 script_debug(): command - ocd_stm32.cpu ocd_stm32.cpu cget -chain-position Debug: 244 30925 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_jtag tapisenabled stm32.cpu Debug: 245 30925 command.c:133 script_debug(): command - ocd_jtag ocd_jtag tapisenabled stm32.cpu Debug: 246 30925 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_stm32.cpu arp_examine Debug: 247 30925 command.c:133 script_debug(): command - ocd_stm32.cpu ocd_stm32.cpu arp_examine Debug: 248 30925 arm_adi_v5.c:1204 ahbap_debugport_init(): Debug: 249 30928 arm_adi_v5.c:1265 ahbap_debugport_init(): MEM-AP #0 ID Register 0x14770011, Debug ROM Address 0xe00ff003 Debug: 250 30928 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_stm32.cpu invoke-event reset-assert-pre Debug: 251 30928 command.c:133 script_debug(): command - ocd_stm32.cpu ocd_stm32.cpu invoke-event reset-assert-pre Debug: 252 30928 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_stm32.cpu cget -chain-position Debug: 253 30928 command.c:133 script_debug(): command - ocd_stm32.cpu ocd_stm32.cpu cget -chain-position Debug: 254 30928 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_jtag tapisenabled stm32.cpu Debug: 255 30928 command.c:133 script_debug(): command - ocd_jtag ocd_jtag tapisenabled stm32.cpu Debug: 256 30928 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_stm32.cpu arp_reset assert 1 Debug: 257 30928 command.c:133 script_debug(): command - ocd_stm32.cpu ocd_stm32.cpu arp_reset assert 1 Debug: 258 30928 cortex_m3.c:784 cortex_m3_assert_reset(): target->state: halted Debug: 259 30931 cortex_m3.c:891 cortex_m3_assert_reset(): Using Cortex-M3 SYSRESETREQ Debug: 260 30932 cortex_m3.c:499 cortex_m3_halt(): target->state: reset Debug: 261 30932 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_stm32.cpu invoke-event reset-assert-post Debug: 262 30932 command.c:133 script_debug(): command - ocd_stm32.cpu ocd_stm32.cpu invoke-event reset-assert-post Debug: 263 30932 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_stm32.cpu invoke-event reset-deassert-pre Debug: 264 30932 command.c:133 script_debug(): command - ocd_stm32.cpu ocd_stm32.cpu invoke-event reset-deassert-pre Debug: 265 30932 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_stm32.cpu cget -chain-position Debug: 266 30932 command.c:133 script_debug(): command - ocd_stm32.cpu ocd_stm32.cpu cget -chain-position Debug: 267 30932 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_jtag tapisenabled stm32.cpu Debug: 268 30932 command.c:133 script_debug(): command - ocd_jtag ocd_jtag tapisenabled stm32.cpu Debug: 269 30932 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_stm32.cpu arp_reset deassert 1 Debug: 270 30933 command.c:133 script_debug(): command - ocd_stm32.cpu ocd_stm32.cpu arp_reset deassert 1 Debug: 271 30933 cortex_m3.c:921 cortex_m3_deassert_reset(): target->state: reset Debug: 272 30933 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_stm32.cpu invoke-event reset-deassert-post Debug: 273 30933 command.c:133 script_debug(): command - ocd_stm32.cpu ocd_stm32.cpu invoke-event reset-deassert-post Debug: 274 30933 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_stm32.cpu cget -chain-position Debug: 275 30933 command.c:133 script_debug(): command - ocd_stm32.cpu ocd_stm32.cpu cget -chain-position Debug: 276 30933 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_jtag tapisenabled stm32.cpu Debug: 277 30933 command.c:133 script_debug(): command - ocd_jtag ocd_jtag tapisenabled stm32.cpu Debug: 278 30933 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_stm32.cpu arp_waitstate halted 1000 Debug: 279 30933 command.c:133 script_debug(): command - ocd_stm32.cpu ocd_stm32.cpu arp_waitstate halted 1000 Debug: 280 30985 cortex_m3.c:452 cortex_m3_poll(): Exit from reset with dcb_dhcsr 0x30003 Debug: 281 30985 cortex_m3.c:195 cortex_m3_endreset_event(): DCB_DEMCR = 0x01000501 Debug: 282 30987 target.c:1565 target_write_u32(): address: 0xe0002000, value: 0x00000003 Debug: 283 30988 target.c:1565 target_write_u32(): address: 0xe0002008, value: 0x00000000 Debug: 284 30989 target.c:1565 target_write_u32(): address: 0xe000200c, value: 0x00000000 Debug: 285 30989 target.c:1565 target_write_u32(): address: 0xe0002010, value: 0x00000000 Debug: 286 30990 target.c:1565 target_write_u32(): address: 0xe0002014, value: 0x00000000 Debug: 287 30991 target.c:1565 target_write_u32(): address: 0xe0002018, value: 0x00000000 Debug: 288 30991 target.c:1565 target_write_u32(): address: 0xe000201c, value: 0x00000000 Debug: 289 30992 target.c:1565 target_write_u32(): address: 0xe0002020, value: 0x00000000 Debug: 290 30993 target.c:1565 target_write_u32(): address: 0xe0002024, value: 0x00000000 Debug: 291 30993 target.c:1565 target_write_u32(): address: 0xe0001020, value: 0x00000000 Debug: 292 30994 target.c:1565 target_write_u32(): address: 0xe0001024, value: 0x00000000 Debug: 293 30995 target.c:1565 target_write_u32(): address: 0xe0001028, value: 0x00000000 Debug: 294 30995 target.c:1565 target_write_u32(): address: 0xe0001030, value: 0x00000000 Debug: 295 30996 target.c:1565 target_write_u32(): address: 0xe0001034, value: 0x00000000 Debug: 296 30997 target.c:1565 target_write_u32(): address: 0xe0001038, value: 0x00000000 Debug: 297 30998 target.c:1565 target_write_u32(): address: 0xe0001040, value: 0x00000000 Debug: 298 30998 target.c:1565 target_write_u32(): address: 0xe0001044, value: 0x00000000 Debug: 299 30999 target.c:1565 target_write_u32(): address: 0xe0001048, value: 0x00000000 Debug: 300 30999 target.c:1565 target_write_u32(): address: 0xe0001050, value: 0x00000000 Debug: 301 31000 target.c:1565 target_write_u32(): address: 0xe0001054, value: 0x00000000 Debug: 302 31001 target.c:1565 target_write_u32(): address: 0xe0001058, value: 0x00000000 Debug: 303 31003 cortex_m3.c:336 cortex_m3_debug_entry(): Debug: 304 31005 cortex_m3.c:151 cortex_m3_clear_halt(): NVIC_DFSR 0x1 Debug: 305 31008 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 0 value 0xffff7ffc Debug: 306 31010 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 1 value 0xffffffff Debug: 307 31012 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 2 value 0x79f277c6 Debug: 308 31013 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 3 value 0x57cc3d9b Debug: 309 31015 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 4 value 0xfbbffae6 Debug: 310 31017 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 5 value 0x62d7fff8 Debug: 311 31019 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 6 value 0x6afa6ef7 Debug: 312 31020 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 7 value 0xece06979 Debug: 313 31022 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 8 value 0xf7ffffdd Debug: 314 31024 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 9 value 0xf7ffffff Debug: 315 31026 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 10 value 0x6e5e7d81 Debug: 316 31027 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 11 value 0x7ece6bd7 Debug: 317 31029 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 12 value 0xffffcfff Debug: 318 31031 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 13 value 0xffffffdc Debug: 319 31033 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 14 value 0xfffffff9 Debug: 320 31034 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 15 value 0xfffffffe Debug: 321 31036 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 16 value 0x1000003 Debug: 322 31038 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 17 value 0xffffffdc Debug: 323 31040 cortex_m3.c:1346 cortex_m3_load_core_reg_u32(): load from core reg 18 value 0xca58f3c8 Debug: 324 31041 cortex_m3.c:1378 cortex_m3_load_core_reg_u32(): load from special reg 19 value 0x0 Debug: 325 31043 cortex_m3.c:1378 cortex_m3_load_core_reg_u32(): load from special reg 20 value 0x0 Debug: 326 31045 cortex_m3.c:1378 cortex_m3_load_core_reg_u32(): load from special reg 21 value 0x0 Debug: 327 31047 cortex_m3.c:1378 cortex_m3_load_core_reg_u32(): load from special reg 22 value 0x0 Debug: 328 31049 cortex_m3.c:322 cortex_m3_examine_exception_reason(): HardFault SHCSR 0x0, SR 0x40000000, CFSR 0x1001, AR 0xffffffff Debug: 329 31049 cortex_m3.c:396 cortex_m3_debug_entry(): entered debug state in core mode: Handler at PC 0xfffffffe, target->state: halted Debug: 330 31049 target.c:968 target_call_event_callbacks(): target event 2 (gdb-halt) Debug: 331 31049 target.c:968 target_call_event_callbacks(): target event 3 (halted) User : 332 31049 target.c:1234 target_arch_state(): target state: halted User : 333 31049 armv7m.c:489 armv7m_arch_state(): target halted due to debug-request, current mode: Handler HardFault xPSR: 0x01000003 pc: 0xfffffffe msp: 0xffffffdc Debug: 334 31049 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_stm32.cpu curstate Debug: 335 31049 command.c:133 script_debug(): command - ocd_stm32.cpu ocd_stm32.cpu curstate Debug: 336 31049 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_stm32.cpu cget -chain-position Debug: 337 31049 command.c:133 script_debug(): command - ocd_stm32.cpu ocd_stm32.cpu cget -chain-position Debug: 338 31049 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_jtag tapisenabled stm32.cpu Debug: 339 31049 command.c:133 script_debug(): command - ocd_jtag ocd_jtag tapisenabled stm32.cpu Debug: 340 31049 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_stm32.cpu arp_waitstate halted 5000 Debug: 341 31049 command.c:133 script_debug(): command - ocd_stm32.cpu ocd_stm32.cpu arp_waitstate halted 5000 Debug: 342 31050 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_stm32.cpu invoke-event reset-init Debug: 343 31050 command.c:133 script_debug(): command - ocd_stm32.cpu ocd_stm32.cpu invoke-event reset-init Debug: 344 31050 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_stm32.cpu invoke-event reset-end Debug: 345 31050 command.c:133 script_debug(): command - ocd_stm32.cpu ocd_stm32.cpu invoke-event reset-end Debug: 346 46800 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_mdw 0x08000000 32 Debug: 347 46800 command.c:133 script_debug(): command - mdw ocd_mdw 0x08000000 32 Debug: 349 46808 arm_adi_v5.c:335 jtagdp_transaction_endcheck(): jtag-dp: CTRL/STAT error, 0xf0000021 Error: 350 46808 arm_adi_v5.c:361 jtagdp_transaction_endcheck(): JTAG-DP STICKY ERROR Debug: 351 46809 arm_adi_v5.c:373 jtagdp_transaction_endcheck(): jtag-dp: CTRL/STAT 0xf0000001 Error: 352 46810 arm_adi_v5.c:380 jtagdp_transaction_endcheck(): MEM_AP_CSW 0x23000052, MEM_AP_TAR 0x8000004 Debug: 353 46816 arm_adi_v5.c:335 jtagdp_transaction_endcheck(): jtag-dp: CTRL/STAT error, 0xf0000021 Error: 354 46816 arm_adi_v5.c:361 jtagdp_transaction_endcheck(): JTAG-DP STICKY ERROR Debug: 355 46817 arm_adi_v5.c:373 jtagdp_transaction_endcheck(): jtag-dp: CTRL/STAT 0xf0000001 Error: 356 46818 arm_adi_v5.c:380 jtagdp_transaction_endcheck(): MEM_AP_CSW 0x23000052, MEM_AP_TAR 0x8000004 Warn : 357 46818 arm_adi_v5.c:989 mem_ap_read_buf_u32(): Block read error address 0x8000000, count 0x20 Debug: 358 46818 command.c:620 run_command(): Command failed with error code -107 User : 359 46818 command.c:824 openocd_jim_vfprintf(): Command handler execution failed User : 362 46818 command.c:824 openocd_jim_vfprintf(): User : 364 46818 command.c:824 openocd_jim_vfprintf(): Debug: 365 56285 command.c:133 script_debug(): command - ocd_command ocd_command type ocd_mdw 0x20000000 32 Debug: 366 56285 command.c:133 script_debug(): command - mdw ocd_mdw 0x20000000 32 User : 368 56293 command.c:539 command_print(): 0x20000000: deadbabe deadbabe deadbabe deadbabe deadbabe deadbabe deadbabe deadbabe User : 369 56293 command.c:539 command_print(): 0x20000020: deadbabe deadbabe deadbabe deadbabe deadbabe deadbabe deadbabe deadbabe User : 370 56293 command.c:539 command_print(): 0x20000040: deadbabe deadbabe deadbabe deadbabe deadbabe deadbabe deadbabe deadbabe User : 371 56293 command.c:539 command_print(): 0x20000060: deadbabe deadbabe deadbabe deadbabe deadbabe deadbabe deadbabe deadbabe
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