On Thursday 21 January 2010, Edgar Grimberg wrote: > >> and want to see what a bisection that skips known-incomplete stuff > >> will turn up. > > 5eb893ec41c8c6cf6499558b6fed826b65e18a16 is first bad commit > commit 5eb893ec41c8c6cf6499558b6fed826b65e18a16 > Author: David Brownell <dbrown...@users.sourceforge.net> > Date: Tue Nov 24 01:27:16 2009 -0800 > > ARM11: partial support for standard ARM register interfaces. > > This provides "standard" ARM register support -- with twenty or > more shadow registers on top of what this code now handles, but > properly associated with the various core modes -- parallel to > the current register code. That is, the current code is still > managing the "current" registers; the new code shadows them. > > ... > > So it's not a full migration, there are warts -- every place that > touches the old register cache is a potential bug -- but it's a > small more-or-less-comprehensible step that's even somewhat useful. > Later patches complete the migration. > > Signed-off-by: David Brownell <dbrown...@users.sourceforge.net> > > > Does this make more sense?
No. There's still the basic "that patch doesn't touch breakpoints" issue, as in "how could it even matter". But more to the point, that doesn't skip "known incomplete" stuff, as noted in that last paragraph in the patch description ... on the theory that breakpoint code wraps one of those "warts". The migration is finished by commit 3efc99b34a934cb4d657ec27a164769c46c10f28 Author: David Brownell <dbrown...@users.sourceforge.net> Date: Tue Nov 24 01:27:29 2009 -0800 ARM11: remove old R0..R15/CPSR code This finishes the basic switchover to the new register code, for everything except the debug registers. (And maybe we shouldn't have a cache for *those* which works this way...) The context save/restore code now uses the new code, but it's in a slightly different sequence. That should be fine since the R0/PC/CPSR stuff is all that really matters (and if we can update those, we can update the rest). Now there's no longer a way any code can be confused about which copy of "r1" (etc) to use. Signed-off-by: David Brownell <dbrown...@users.sourceforge.net> which, again, doesn't touch the debug (breakpoint etc) registers. I hope, by the way, you were testing RC1+ with commit 6c4a643d632c6cff647c5099bd450d1e417903ea Author: David Brownell <dbrown...@users.sourceforge.net> Date: Fri Jan 15 12:53:26 2010 -0800 ARM DPM: disable some nyet-ready breakpoint code Until we manage breakpoints at runtime (patches not ready for 0.4) the only way this code should touch them is to disable them at server startup (a previous debug session may have left them active). Signed-off-by: David Brownell <dbrown...@users.sourceforge.net> and not some older version of the tree. That guards against potential glitches. - Dave _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development