On Wed, Jan 20, 2010 at 2:57 PM, Edgar Grimberg <edgar.grimb...@zylin.com> wrote: > I suspect there is a problem with ARM11 debugging for version > v0.4.0-rc1-128-g0c3a4b4. It seems I cannot insert  breakpoints:
I've done a git bisect: $ git bisect log git bisect start # good: [70f735007d7b0f7ec9d269c4529d9f62c0eb779d] The openocd 0.3.0-rc0 release. git bisect good 70f735007d7b0f7ec9d269c4529d9f62c0eb779d # bad: [87cb29dcfe1e6900620319c3f90ed67f8ebefa0e] testing: fix str710 test case now builds git bisect bad 87cb29dcfe1e6900620319c3f90ed67f8ebefa0e # good: [0583cb0a0d222787c4048f9362292c5db9d969b0] support for scripts in $HOME/.openocd git bisect good 0583cb0a0d222787c4048f9362292c5db9d969b0 # bad: [6db3ed48c6d152446dafc70b8495970cd2b22d3a] change #include "httpd.h" to <server/httpd.h> git bisect bad 6db3ed48c6d152446dafc70b8495970cd2b22d3a # bad: [68889ea02f28bfd61f0b4b85aad4b0bf8826a947] target: remove unused TARGET_EVENT_OLD_* symbols git bisect bad 68889ea02f28bfd61f0b4b85aad4b0bf8826a947 # bad: [5e977b46c3a4688d9bf5091306ce3003f1bd6713] str9x: use register_commands() git bisect bad 5e977b46c3a4688d9bf5091306ce3003f1bd6713 # bad: [e7fd1d3d5031a98e56503c46baa0c2f23ac7d88c] hello: use register_commands() git bisect bad e7fd1d3d5031a98e56503c46baa0c2f23ac7d88c # bad: [5507b5f430e3d6bef00a7ffcd51df29c13d7477e] fix doxygen build git bisect bad 5507b5f430e3d6bef00a7ffcd51df29c13d7477e # bad: [3efc99b34a934cb4d657ec27a164769c46c10f28] ARM11: remove old R0..R15/CPSR code git bisect bad 3efc99b34a934cb4d657ec27a164769c46c10f28 # good: [6ff33a4ee8db483e29bc78b8c35e50342ca60850] ARM11: remove register "history" debug stuff git bisect good 6ff33a4ee8db483e29bc78b8c35e50342ca60850 # bad: [bf3abc48f008e0a0c0e42b943481872599463af6] ARM11: use standard single step simulation git bisect bad bf3abc48f008e0a0c0e42b943481872599463af6 # bad: [5eb893ec41c8c6cf6499558b6fed826b65e18a16] ARM11: partial support for standard ARM register interfaces. git bisect bad 5eb893ec41c8c6cf6499558b6fed826b65e18a16 and $ git bisect bad 5eb893ec41c8c6cf6499558b6fed826b65e18a16 is first bad commit commit 5eb893ec41c8c6cf6499558b6fed826b65e18a16 Author: David Brownell <dbrown...@users.sourceforge.net> Date: Tue Nov 24 01:27:16 2009 -0800 ARM11: partial support for standard ARM register interfaces. This provides "standard" ARM register support -- with twenty or more shadow registers on top of what this code now handles, but properly associated with the various core modes -- parallel to the current register code. That is, the current code is stilil managing the "current" registers; the new code shadows them. You can see all the registers with "arm reg", modify the shadows like "r8_fiq" or "sp_abt" with "reg", and see them get properly written back when you step. (Just don't do that with any of the registers managed by the "old" code ...) It also switches to using more standard code, relying on those standard registers, in two places: (a) the poll status display, which now shows core state (ARM/Thumb/...) and mode (Supervisor, IRQ, etc); and (b) GDB register access. So it's not a full migration, there are warts -- every place that touches the old register cache is a potential bug -- but it's a small more-or-less-comprehensible step that's even somewhat useful. Later patches complete the migration. Signed-off-by: David Brownell <dbrown...@users.sourceforge.net> Regards, Edgar -- Edgar Grimberg System Developer Zylin AS ZY1000 JTAG Debugger http://www.zylin.com/zy1000.html Phone: (+47) 51 63 25 00 _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development