> SVN 2645: writes 512k to flash, verifies correctly > SVN 2646: flash write_image fails with "timed out while waiting for target > debug-running"
Hmm..... this is trickier than I thought.... Can you provide debug_level 3 logs for 2645 and 2646? Try to use the *EXACT* same procedure so the logs can be diff'ed using text diff... (With a bit of manual tinkering...) I see from the log that the the hardware breakpoint is set correctly and that the CPU halts at the address after the DCC algorithm(0x850). The DCC algorithm should run indefinitely until halted when all data has been written to memory... I'm stumped as to what this might have to do with 2645 and 2646.... Except if hw breakpoints were *broken* somehow in 2645 and that hides some other problem that 2645 is somehow able to recover from.... I/D caches appear to be disabled... Is it conceivable that 2645 is in fact broken too and that something conspired to make the test come out as a false positive? -- Øyvind Harboe http://www.zylin.com/zy1000.html ARM7 ARM9 ARM11 XScale Cortex JTAG debugger and flash programmer _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development