Hi Freddie,
I didn't find the time yet to write a few comments. But here they are:
They are all meant to be constructive and friendly! :-)
How would you write a board file for a board with two LPC2103 in the chain?
A simple
source [find target/lpc2103.cfg]
source [find target/lpc2103.cfg]
wouldn't work because it would try to declare two targets with the same name
(lpc2103.cpu).
Previously it was possible to write:
set CHIPNAME chip1
source [find target/lpc2103.cfg]
set CHIPNAME chip2
source [find target/lpc2103.cfg]
It gave you two targets chip1.cpu and chip2.cpu.
Regarding the clock speed: What you call CRYSTAL_FREQ is the frequency that is
in use when you do the flash programming. In order to be able to maximize the
download speed, I want to enable the PLL in the "reset init" script. This
operating frequency isn't really related to the crystal frequency, and I think
the name CRYSTAL_FREQ is misleading.
Many people in the past had problems with flash programming because they
specified the crystal frequency where they should have used the real CCLK!
This clock frequency is something that the user should specify in a board file.
The reset init script must be available to the user, because he needs it to add
the PLL initialization. Where would I enable the PLL when a default reset init
script is already defined in the target script?
The working area should start at 0x40000200. This makes sure that there is no
conflict with possible temporary storage of IAP code (has been a problem in the
past, although the 0x40000000--0x400001FF area should have been used by ISP
code only).
A strict requirement is to not touch the upper 32 bytes of the internal SRAM.
This RAM area is definitely used by the IAP routines internally!
There are devices with external memory bus. A user might want to use an
external RAM for the working area instead of the internal SRAM. Therefore I
think the working area declaration is board specific and doesn't belong to the
target declaration.
What do you think about modifying the LPC2000 flash driver to adapt itself to
the various devices? It can read the part id and auto-configure itself. You
could keep the FLASH_SIZE and RAM_SIZE variables to override any automatic
detection. I feel it would make life a lot easier!
Regards,
Rolf
--- Freddie Chopin <freddie_cho...@op.pl> schrieb am So, 27.9.2009:
> Von: Freddie Chopin <freddie_cho...@op.pl>
> Betreff: Re: [Openocd-development] new lpc2xxx cfg files layout
> An: "openocd-development" <openocd-development@lists.berlios.de>
> Datum: Sonntag, 27. September 2009, 21:05
> Be it your way...
>
> 4\/3!!
>
> -----Integrierter Anhang folgt-----
>
> Index: tcl/target/lpc2103.cfg
> ===================================================================
> --- tcl/target/lpc2103.cfg (revision
> 2744)
> +++ tcl/target/lpc2103.cfg (working
> copy)
> @@ -1,38 +1,19 @@
> -# NXP LPC2103 ARM7TDMI-S with 32kB Flash and 8kB SRAM,
> clocked with 12MHz crystal
> +# NXP LPC2103 ARM7TDMI-S with 32kB Flash and 8kB SRAM
> +#
> -----------------------------------------------------------------------------
> +# do not use this file directly! the caller has to specify
> CRYSTAL_FREQ with:
> +# set CRYSTAL_FREQ <frequency in Hz>
> +#
> -----------------------------------------------------------------------------
>
> -if { [info exists CHIPNAME] } {
> - set _CHIPNAME $CHIPNAME
> -} else {
> - set _CHIPNAME lpc2103
> -}
> +set CHIPNAME lpc2103
> +set FLASH_SIZE 0x8000
> +set RAM_SIZE 0x2000
>
> -if { [info exists ENDIAN] } {
> - set _ENDIAN $ENDIAN
> -} else {
> - set _ENDIAN little
> -}
> +set VARIANT lpc2000_v2
>
> -if { [info exists CPUTAPID ] } {
> - set _CPUTAPID $CPUTAPID
> -} else {
> - set _CPUTAPID 0x4f1f0f0f
> -}
> +set CPUTAPID 0x4f1f0f0f
>
> -# LPC2000 -> SRST causes TRST
> -reset_config trst_and_srst srst_pulls_trst
> +set JTAG_FREQ 1000000
>
> -# reset delays
> -jtag_nsrst_delay 100
> -jtag_ntrst_delay 100
> +set RESET_CONFIG trst_and_srst
>
> -jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask
> 0xf -expected-id $_CPUTAPID
> -
> -set _TARGETNAME $_CHIPNAME.cpu
> -target create $_TARGETNAME arm7tdmi -endian $_ENDIAN
> -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
> -
> -# 8kB of internal SRAM
> -$_TARGETNAME configure -work-area-virt 0 -work-area-phys
> 0x40000000 -work-area-size 0x2000 -work-area-backup 0
> -
> -# 32kB of internal Flash, core clocked with 12MHz crystal
> -# flash bank lpc2000 <base> <size> 0 0
> <target#> <variant> <clock>
> [calc_checksum]
> -flash bank lpc2000 0x0 0x8000 0 0 0 lpc2000_v2 12000
> calc_checksum
> +source [find target/lpc2xxx_internals.tcl]
> Index: tcl/target/lpc2124.cfg
> ===================================================================
> --- tcl/target/lpc2124.cfg (revision
> 2744)
> +++ tcl/target/lpc2124.cfg (working
> copy)
> @@ -1,42 +1,19 @@
> -#LPC-2124 CPU
> +# NXP LPC2124 ARM7TDMI-S with 256kB Flash and 16kB SRAM
> +#
> -----------------------------------------------------------------------------
> +# do not use this file directly! the caller has to specify
> CRYSTAL_FREQ with:
> +# set CRYSTAL_FREQ <frequency in Hz>
> +#
> -----------------------------------------------------------------------------
>
> -if { [info exists CHIPNAME] } {
> - set _CHIPNAME $CHIPNAME
> -} else {
> - set _CHIPNAME lpc2124
> -}
> +set CHIPNAME lpc2124
> +set FLASH_SIZE 0x40000
> +set RAM_SIZE 0x4000
>
> -if { [info exists ENDIAN] } {
> - set _ENDIAN $ENDIAN
> -} else {
> - set _ENDIAN little
> -}
> +set VARIANT lpc2000_v1
>
> -if { [info exists CPUTAPID ] } {
> - set _CPUTAPID $CPUTAPID
> -} else {
> - # force an error till we get a good number
> - set _CPUTAPID 0x4f1f0f0f
> -}
> +set CPUTAPID 0x4f1f0f0f
>
> +set JTAG_FREQ 1000000
>
> -#use combined on interfaces or targets that can't set
> TRST/SRST separately
> -reset_config trst_and_srst srst_pulls_trst
> +set RESET_CONFIG trst_and_srst
>
> -# reset delays
> -jtag_nsrst_delay 100
> -jtag_ntrst_delay 100
> -
> -jtag_khz 1000
> -
> -#jtag scan chain
> -jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask
> 0xf -expected-id $_CPUTAPID
> -
> -set _TARGETNAME $_CHIPNAME.cpu
> -target create $_TARGETNAME arm7tdmi -endian $_ENDIAN
> -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
> -
> -$_TARGETNAME configure -work-area-virt 0 -work-area-phys
> 0x40000000 -work-area-size 0x4000 -work-area-backup 0
> -
> -
> -#flash bank <driver> <base> <size>
> <chip_width> <bus_width>
> -flash bank lpc2000 0x0 0x40000 0 0 0 lpc2000_v1 14745
> calc_checksum
> +source [find target/lpc2xxx_internals.tcl]
> Index: tcl/target/lpc2129.cfg
> ===================================================================
> --- tcl/target/lpc2129.cfg (revision
> 2744)
> +++ tcl/target/lpc2129.cfg (working
> copy)
> @@ -1,41 +1,19 @@
> -#LPC-2129 CPU
> +# NXP LPC2129 ARM7TDMI-S with 256kB Flash and 16kB SRAM
> +#
> -----------------------------------------------------------------------------
> +# do not use this file directly! the caller has to specify
> CRYSTAL_FREQ with:
> +# set CRYSTAL_FREQ <frequency in Hz>
> +#
> -----------------------------------------------------------------------------
>
> +set CHIPNAME lpc2129
> +set FLASH_SIZE 0x40000
> +set RAM_SIZE 0x4000
>
> -if { [info exists CHIPNAME] } {
> - set _CHIPNAME $CHIPNAME
> -} else {
> - set _CHIPNAME lpc2129
> -}
> +set VARIANT lpc2000_v1
>
> -if { [info exists ENDIAN] } {
> - set _ENDIAN $ENDIAN
> -} else {
> - set _ENDIAN little
> -}
> +set CPUTAPID 0x4f1f0f0f
>
> -if { [info exists CPUTAPID ] } {
> - set _CPUTAPID $CPUTAPID
> -} else {
> - # force an error till we get a good number
> - set _CPUTAPID 0xffffffff
> -}
> +set JTAG_FREQ 1000000
>
> +set RESET_CONFIG trst_and_srst
>
> -#use combined on interfaces or targets that can't set
> TRST/SRST separately
> -reset_config trst_and_srst srst_pulls_trst
> -
> -# reset delays
> -jtag_nsrst_delay 100
> -jtag_ntrst_delay 100
> -
> -#jtag scan chain
> -jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask
> 0xf -expected-id $_CPUTAPID
> -
> -
> -set _TARGETNAME $_CHIPNAME.cpu
> -target create $_TARGETNAME arm7tdmi -endian $_ENDIAN
> -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
> -
> -$_TARGETNAME configure -work-area-virt 0 -work-area-phys
> 0x40000000 -work-area-size 0x4000 -work-area-backup 0
> -
> -#flash bank <driver> <base> <size>
> <chip_width> <bus_width>
> -flash bank lpc2000 0x0 0x40000 0 0 0 lpc2000_v1 14765
> calc_checksum
> +source [find target/lpc2xxx_internals.tcl]
> Index: tcl/target/lpc2148.cfg
> ===================================================================
> --- tcl/target/lpc2148.cfg (revision
> 2744)
> +++ tcl/target/lpc2148.cfg (working
> copy)
> @@ -1,55 +1,20 @@
> -# Use RCLK. If RCLK is not available fall back to 500kHz.
> -#
> -# Depending on cabling you might be able to eek this up to
> 2000kHz.
> -jtag_rclk 500
> +# NXP LPC2148 ARM7TDMI-S with 512kB Flash (12kB occupied
> by bootloader) and
> +# 32kB Local On-Chip SRAM (40kB total)
> +#
> -----------------------------------------------------------------------------
> +# do not use this file directly! the caller has to specify
> CRYSTAL_FREQ with:
> +# set CRYSTAL_FREQ <frequency in Hz>
> +#
> -----------------------------------------------------------------------------
>
> -if { [info exists CHIPNAME] } {
> - set _CHIPNAME $CHIPNAME
> -} else {
> - set _CHIPNAME lpc2148
> -}
> +set CHIPNAME lpc2148
> +set FLASH_SIZE 0x7d000
> +set RAM_SIZE 0x8000
>
> -if { [info exists ENDIAN] } {
> - set _ENDIAN $ENDIAN
> -} else {
> - set _ENDIAN little
> -}
> +set VARIANT lpc2000_v2
>
> -if { [info exists CPUTAPID ] } {
> - set _CPUTAPID $CPUTAPID
> -} else {
> - set _CPUTAPID 0x4f1f0f0f
> -}
> +set CPUTAPID 0x4f1f0f0f
>
> -jtag_nsrst_delay 200
> -jtag_ntrst_delay 200
> +set JTAG_FREQ 1000000
>
> -# NOTE!!! LPCs need reset pulled while RTCK is low. 0 to
> activate
> -# JTAG, power-on reset is not enough, i.e. you need to
> perform a
> -# reset before being able to talk to the LPC2148, attach
> is not possible.
> +set RESET_CONFIG trst_and_srst
>
> -reset_config trst_and_srst srst_pulls_trst
> -
> -jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask
> 0xf -expected-id $_CPUTAPID
> -
> -set _TARGETNAME $_CHIPNAME.cpu
> -target create $_TARGETNAME arm7tdmi -endian $_ENDIAN
> -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
> -
> -$_TARGETNAME configure -work-area-virt 0 -work-area-phys
> 0x40000000 -work-area-size 0x4000 -work-area-backup 0
> -
> -$_TARGETNAME configure -event reset-init {
> - # Force target into ARM state
> - armv4_5 core_state arm
> -
> - # Do not remap 0x0000-0x0020 to
> anything but the flash (i.e. select
> - # "User Flash Mode" where interrupt
> vectors are _not_ remapped,
> - # and reside in flash instead).
> - #
> - # See section 7.1 on page 32 ("Memory
> Mapping control register") in
> - # "UM10139: Volume 1: LPC214x User
> Manual", Rev. 02 -- 25 July 2006.
> - #
> http://www.standardics.nxp.com/support/documents/microcontrollers/pdf/user.manual.lpc2141.lpc2142.lpc2144.lpc2146.lpc2148.pdf
> - mwb 0xE01FC040 0x01
> -}
> -
> -# flash bank lpc2000 <base> <size> 0 0
> <target#> <variant> <clock>
> [calc_checksum]
> -flash bank lpc2000 0x0 0x7d000 0 0 0 lpc2000_v2 14765
> calc_checksum
> +source [find target/lpc2xxx_internals.tcl]
> Index: tcl/target/lpc2294.cfg
> ===================================================================
> --- tcl/target/lpc2294.cfg (revision
> 2744)
> +++ tcl/target/lpc2294.cfg (working
> copy)
> @@ -1,38 +1,19 @@
> -if { [info exists CHIPNAME] } {
> - set _CHIPNAME $CHIPNAME
> -} else {
> - set _CHIPNAME lpc2294
> -}
> +# NXP LPC2294 ARM7TDMI-S with 256kB Flash and 16kB SRAM
> +#
> -----------------------------------------------------------------------------
> +# do not use this file directly! the caller has to specify
> CRYSTAL_FREQ with:
> +# set CRYSTAL_FREQ <frequency in Hz>
> +#
> -----------------------------------------------------------------------------
>
> -if { [info exists ENDIAN] } {
> - set _ENDIAN $ENDIAN
> -} else {
> - set _ENDIAN little
> -}
> +set CHIPNAME lpc2294
> +set FLASH_SIZE 0x40000
> +set RAM_SIZE 0x4000
>
> -if { [info exists CPUTAPID ] } {
> - set _CPUTAPID $CPUTAPID
> -} else {
> - # force an error till we get a good number
> - set _CPUTAPID 0xffffffff
> -}
> +set VARIANT lpc2000_v1
>
> -jtag_nsrst_delay 200
> -jtag_ntrst_delay 200
> +set CPUTAPID 0x4f1f0f0f
>
> -#use combined on interfaces or targets that can't set
> TRST/SRST separately
> -reset_config trst_and_srst srst_pulls_trst
> +set JTAG_FREQ 1000000
>
> -#jtag scan chain
> -jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask
> 0xf -expected-id $_CPUTAPID
> +set RESET_CONFIG trst_and_srst
>
> -set _TARGETNAME $_CHIPNAME.cpu
> -target create $_TARGETNAME arm7tdmi -endian $_ENDIAN
> -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
> -$_TARGETNAME configure -work-area-virt 0 -work-area-phys
> 0x40000000 -work-area-size 0x4000 -work-area-backup 0
> -
> -#flash configuration
> -#flash bank lpc2000 <base> <size> 0 0
> <target#> <variant>
> -flash bank lpc2000 0x0 0x40000 0 0 0 lpc2000_v1 14765
> calc_checksum
> -
> -# For more information about the configuration files, take
> a look at:
> -# openocd.texi
> +source [find target/lpc2xxx_internals.tcl]
> Index: tcl/target/lpc2378.cfg
> ===================================================================
> --- tcl/target/lpc2378.cfg (revision
> 2744)
> +++ tcl/target/lpc2378.cfg (working
> copy)
> @@ -1,49 +1,20 @@
> -# NXP LPC2378 ARM7TDMI-S with 512kB Flash and 32kB Local
> On-Chip SRAM (58kB total), clocked with 4MHz internal RC
> oscillator
> +# NXP LPC2378 ARM7TDMI-S with 512kB Flash (12kB occupied
> by bootloader) and
> +# 32kB Local On-Chip SRAM (58kB total)
> +#
> -----------------------------------------------------------------------------
> +# do not use this file directly! the caller has to specify
> CRYSTAL_FREQ with:
> +# set CRYSTAL_FREQ <frequency in Hz>
> +#
> -----------------------------------------------------------------------------
>
> -if { [info exists CHIPNAME] } {
> - set _CHIPNAME $CHIPNAME
> -} else {
> - set _CHIPNAME lpc2378
> -}
> +set CHIPNAME lpc2378
> +set FLASH_SIZE 0x7d000
> +set RAM_SIZE 0x8000
>
> -if { [info exists ENDIAN] } {
> - set _ENDIAN $ENDIAN
> -} else {
> - set _ENDIAN little
> -}
> +set VARIANT lpc2000_v2
>
> -if { [info exists CPUTAPID ] } {
> - set _CPUTAPID $CPUTAPID
> -} else {
> - set _CPUTAPID 0x4f1f0f0f
> -}
> +set CPUTAPID 0x4f1f0f0f
>
> -#delays on reset lines
> -jtag_nsrst_delay 200
> -jtag_ntrst_delay 200
> +set JTAG_FREQ 500000
>
> -# LPC2000 -> SRST causes TRST
> -reset_config trst_and_srst srst_pulls_trst
> +set RESET_CONFIG trst_and_srst
>
> -jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask
> 0xf -expected-id $_CPUTAPID
> -
> -set _TARGETNAME $_CHIPNAME.cpu
> -target create $_TARGETNAME arm7tdmi -endian $_ENDIAN
> -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
> -
> -# LPC2378 has 32kB of SRAM on its main system bus
> (so-called Local On-Chip SRAM)
> -$_TARGETNAME configure -work-area-virt 0 -work-area-phys
> 0x40000000 -work-area-size 0x8000 -work-area-backup 0
> -
> -$_TARGETNAME configure -event reset-init {
> - # Force target into ARM state
> - armv4_5 core_state arm
> - #do not remap 0x0000-0x0020 to anything
> but the flash
> - mwb 0xE01FC040 0x01
> -}
> -
> -# LPC2378 has 512kB of FLASH, but upper 8kB are occupied
> by bootloader.
> -# After reset the chip uses its internal 4MHz RC
> oscillator
> -#flash bank lpc2000 <base> <size> 0 0
> <target#> <variant>
> -flash bank lpc2000 0x0 0x0007D000 0 0 0 lpc2000_v2 4000
> calc_checksum
> -
> -# 4MHz / 6 = 666kHz, so use 500
> -jtag_khz 500
> +source [find target/lpc2xxx_internals.tcl]
> Index: tcl/target/lpc2478.cfg
> ===================================================================
> --- tcl/target/lpc2478.cfg (revision
> 2744)
> +++ tcl/target/lpc2478.cfg (working
> copy)
> @@ -1,49 +1,20 @@
> -# NXP LPC2478 ARM7TDMI-S with 512kB Flash and 64kB Local
> On-Chip SRAM (98kB total), clocked with 4MHz internal RC
> oscillator
> +# NXP LPC2478 ARM7TDMI-S with 512kB Flash (12kB occupied
> by bootloader) and
> +# 64kB Local On-Chip SRAM (98kB total)
> +#
> -----------------------------------------------------------------------------
> +# do not use this file directly! the caller has to specify
> CRYSTAL_FREQ with:
> +# set CRYSTAL_FREQ <frequency in Hz>
> +#
> -----------------------------------------------------------------------------
>
> -if { [info exists CHIPNAME] } {
> - set _CHIPNAME $CHIPNAME
> -} else {
> - set _CHIPNAME lpc2478
> -}
> +set CHIPNAME lpc2478
> +set FLASH_SIZE 0x7d000
> +set RAM_SIZE 0x10000
>
> -if { [info exists ENDIAN] } {
> - set _ENDIAN $ENDIAN
> -} else {
> - set _ENDIAN little
> -}
> +set VARIANT lpc2000_v2
>
> -if { [info exists CPUTAPID ] } {
> - set _CPUTAPID $CPUTAPID
> -} else {
> - set _CPUTAPID 0x4f1f0f0f
> -}
> +set CPUTAPID 0x4f1f0f0f
>
> -#delays on reset lines
> -jtag_nsrst_delay 100
> -jtag_ntrst_delay 100
> +set JTAG_FREQ 500000
>
> -# LPC2000 -> SRST causes TRST
> -reset_config trst_and_srst srst_pulls_trst
> +set RESET_CONFIG trst_and_srst
>
> -jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask
> 0xf -expected-id $_CPUTAPID
> -
> -set _TARGETNAME $_CHIPNAME.cpu
> -target create $_TARGETNAME arm7tdmi -endian $_ENDIAN
> -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
> -
> -# LPC2478 has 64kB of SRAM on its main system bus
> (so-called Local On-Chip SRAM)
> -$_TARGETNAME configure -work-area-virt 0 -work-area-phys
> 0x40000000 -work-area-size 0x10000 -work-area-backup 0
> -
> -$_TARGETNAME configure -event reset-init {
> - # Force target into ARM state
> - armv4_5 core_state arm
> - # Do not remap 0x0000-0x0020 to
> anything but the Flash
> - mwb 0xE01FC040 0x01
> -}
> -
> -# LPC2378 has 512kB of FLASH, but upper 8kB are occupied
> by bootloader.
> -# After reset the chip uses its internal 4MHz RC
> oscillator.
> -# flash bank lpc2000 <base> <size> 0 0
> <target#> <variant> <clock> [calc
> checksum]
> -flash bank lpc2000 0x0 0x7D000 0 0 0 lpc2000_v2 12000
> calc_checksum
> -
> -# Try to use RCLK, if RCLK is not available use "normal"
> mode. 4MHz / 6 = 666kHz, so use 500.
> -jtag_rclk 500
> +source [find target/lpc2xxx_internals.tcl]
> Index: tcl/target/lpc2xxx_internals.tcl
> ===================================================================
> --- tcl/target/lpc2xxx_internals.tcl
> (revision 0)
> +++ tcl/target/lpc2xxx_internals.tcl
> (revision 0)
> @@ -0,0 +1,111 @@
> +#
> -----------------------------------------------------------------------------
> +# LPC2xxx internals, do not use this file directly
> +#
> -----------------------------------------------------------------------------
> +
> +# check for CHIPNAME - it has to be defined
> +if { [info exists CHIPNAME ] } {
> + set _CHIPNAME $CHIPNAME
> +} else {
> + error "Variable: CHIPNAME is not set,
> cannot continue"
> +}
> +
> +# check for FLASH_SIZE - if not defined set the default:
> 8kB
> +if { [info exists FLASH_SIZE ] } {
> + set _FLASH_SIZE $FLASH_SIZE
> +} else {
> + set _FLASH_SIZE 0x2000
> + echo "WARNING: FLASH_SIZE not set,
> assuming: $_FLASH_SIZE"
> +}
> +
> +# check for RAM_SIZE - if not defined set the default:
> 2kB
> +if { [info exists RAM_SIZE ] } {
> + set _RAM_SIZE $RAM_SIZE
> +} else {
> + set _RAM_SIZE 0x800
> + echo "WARNING: RAM_SIZE not set,
> assuming: $_RAM_SIZE"
> +}
> +
> +# check for CRYSTAL_FREQ - it has to be defined
> +if { [info exists CRYSTAL_FREQ ] } {
> + set _CRYSTAL_FREQ $CRYSTAL_FREQ
> +} else {
> + error "Variable: CRYSTAL_FREQ is not
> set, cannot continue"
> +}
> +
> +# check for CPUTAPID - if not defined set the default:
> 0x4f1f0f0f
> +if { [info exists CPUTAPID ] } {
> + set _CPUTAPID $CPUTAPID
> +} else {
> + set _CPUTAPID 0x4f1f0f0f
> + echo "WARNING: CPUTAPID not set,
> assuming: $_CPUTAPID"
> +}
> +
> +# check for VARIANT - it has to be defined
> +if { [info exists VARIANT ] } {
> + set _VARIANT $VARIANT
> +} else {
> + error "Variable: VARIANT is not set,
> cannot continue"
> +}
> +
> +# check for JTAG_FREQ - if not defined set the default:
> CRYSTAL_FREQ / 8
> +if { [info exists JTAG_FREQ ] } {
> + set _JTAG_FREQ $JTAG_FREQ
> +} else {
> + set _JTAG_FREQ [expr $_CRYSTAL_FREQ /
> 8]
> + echo "WARNING: JTAG_FREQ not set,
> assuming: $_JTAG_FREQ"
> +}
> +
> +# check for RESET_CONFIG - if not defined set the default:
> trst_and_srst
> +if { [info exists RESET_CONFIG ] } {
> + set _RESET_CONFIG $RESET_CONFIG
> +} else {
> + set _RESET_CONFIG trst_and_srst
> + echo "WARNING: RESET_CONFIG not set,
> assuming: $_RESET_CONFIG"
> +}
> +
> +# convert frequencies to kHz
> +set _CRYSTAL_FREQ_KHZ [expr $_CRYSTAL_FREQ / 1000]
> +set _JTAG_KHZ [expr $_JTAG_FREQ / 1000]
> +
> +#
> -----------------------------------------------------------------------------
> +
> +# LPC2000 -> SRST causes TRST
> +reset_config $_RESET_CONFIG srst_pulls_trst
> +
> +# reset delays
> +jtag_nsrst_delay 100
> +jtag_ntrst_delay 100
> +
> +jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask
> 0xf -expected-id $_CPUTAPID
> +target create $_CHIPNAME.cpu arm7tdmi -chain-position
> $_CHIPNAME.cpu
> +
> +# internal SRAM
> +$_CHIPNAME.cpu configure -work-area-phys 0x40000000
> -work-area-size $_RAM_SIZE -work-area-backup 0
> +
> +# "reset init" script
> +$_CHIPNAME.cpu configure -event reset-init {
> + # force core into ARM state
> + armv4_5 core_state arm
> +
> + # remap the vector table
> (0x0000-0x0020) to Flash
> + # MEMMAP = 1;
> + mwb 0xE01FC040 0x01
> +
> + # disable MAM
> + # MAMCR = 0;
> + mwb 0xE01FC000 0
> +
> + # disconnect and disable PLL (with feed
> sequence)
> + # PLLCON = 0;
> + mwb 0xE01FC080 0
> + # PLLFEED = 0xAA;
> + mwb 0xE01FC08C 0xAA
> + # PLLFEED = 0x55;
> + mwb 0xE01FC08C 0x55
> +}
> +
> +# internal Flash, core clock
> +# flash bank lpc2000 <base> <size> 0 0
> <target#> <variant> <clock>
> [calc_checksum]
> +flash bank lpc2000 0x0 $_FLASH_SIZE 0 0 0 $_VARIANT
> $_CRYSTAL_FREQ_KHZ calc_checksum
> +
> +jtag_khz $_JTAG_KHZ
>
> -----Integrierter Anhang folgt-----
>
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>
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