Magnus Lundin wrote:
Dirk Behme wrote:
David Brownell wrote:
Update the DaVinci target configs so they have JTAG post-reset
event handlers which:
- run the 100 JTAG clocks ICEpick wants
- ensure the ARM (and ETB) taps are enabled
---
The OMAP3 post-reset handlers should probably do something
similar, doing the (updated) omap3_dbginit stuff so that it
no longer needs to be done by hand.
Most probably, I miss the obvious ;)
But in omap3530.cfg doing something like
jtag configure $_CHIPNAME.jrc -event post-reset \
"runtest 100; omap3_dbginit"
obviously fails due to 'reset' command in omap3_dbginit with
Runtime error, file "lib/openocd//target/omap3530.cfg", line 0:
'reset' can not be invoked recursively
with omap3_dbginit being:
proc omap3_dbginit { } {
poll off
reset
sleep 100
jtag tapenable omap3530.dap
targets
# General Cortex A8 debug initialisation
cortex_a8 dbginit
# Enable DBGU singal for OMAP353x
omap3.cpu mww 0x5401d030 0x00002000
poll on
}
Seems that we need some clever order of reset/omap3_dbginit/-event
post-reset I don't see at the moment :(
I think the obvious solution would be to remove the reset call from
omap3_dbginit
Patch in attachment results in errors:
-- cut --
> openocd -s lib/openocd/ -f interface/flyswatter.cfg -f
board/ti_beagleboard.cfg
Open On-Chip Debugger 0.3.0-in-development (2009-09-25-07:27) svn:2754
$URL: svn://svn.berlios.de/openocd/trunk/src/openocd.c $
For bug reports, read
http://svn.berlios.de/svnroot/repos/openocd/trunk/BUGS
RCLK - adaptive
Warn : huge IR length 38
Info : RCLK (adaptive clock speed) not supported - fallback to 6000
kHz
TargetName Type Endian TapName State
-- ------------------ ---------- ------ ------------------
------------
0* omap3.cpu cortex_a8 little omap3530.dap unknown
Error: AHBAP Cached values: dp_select 0x10, ap_csw 0xa2000002, ap_tar
0xfb0
Error: SWJ-DP STICKY ERROR
Error: Read MEM_AP_CSW 0x2800042, MEM_AP_TAR 0xfb0
Error: AHBAP Cached values: dp_select 0x10, ap_csw 0xa2000002, ap_tar
0x310
Error: SWJ-DP STICKY ERROR
Error: Read MEM_AP_CSW 0x2800042, MEM_AP_TAR 0x310
Error: Target not examined yet
Runtime error, file "lib/openocd//target/omap3530.cfg", line 54:
Error writing @ 0x5401d030: -4
TargetName Type Endian TapName State
-- ------------------ ---------- ------ ------------------ ------------
0* omap3.cpu cortex_a8 little omap3530.dap unknown
Error: AHBAP Cached values: dp_select 0x10, ap_csw 0xa2000002, ap_tar
0xfb0
Error: SWJ-DP STICKY ERROR
Error: Read MEM_AP_CSW 0x2800042, MEM_AP_TAR 0xfb0
Error: AHBAP Cached values: dp_select 0x10, ap_csw 0xa2000002, ap_tar
0xfb0
Error: SWJ-DP STICKY ERROR
Error: Read MEM_AP_CSW 0x2800042, MEM_AP_TAR 0xfb0
Error: AHBAP Cached values: dp_select 0x10, ap_csw 0xa2000002, ap_tar
0x310
Error: SWJ-DP STICKY ERROR
Error: Read MEM_AP_CSW 0x2800042, MEM_AP_TAR 0x310
Error: Target not examined yet
Runtime error, file "lib/openocd//target/omap3530.cfg", line 54:
Error writing @ 0x5401d030: -4
Warn : TAP omap3530.dap does not have IDCODE
Error: JTAG tap: omap3530.dap UNEXPECTED: 0x00000000 (mfg:
0x000, part: 0x0000, ver: 0x0)
Error: JTAG tap: omap3530.dap expected 1 of 1: 0x0b6d602f (mfg:
0x017, part: 0xb6d6, ver: 0x0)
Error: trying to validate configured JTAG chain anyway...
TargetName Type Endian TapName State
-- ------------------ ---------- ------ ------------------ ------------
0* omap3.cpu cortex_a8 little omap3530.dap unknown
Error: AHBAP Cached values: dp_select 0x10, ap_csw 0xa2000002, ap_tar
0xfb0
Error: SWJ-DP STICKY ERROR
Error: Read MEM_AP_CSW 0x2800042, MEM_AP_TAR 0xfb0
Error: AHBAP Cached values: dp_select 0x10, ap_csw 0xa2000002, ap_tar
0xfb0
Error: SWJ-DP STICKY ERROR
Error: Read MEM_AP_CSW 0x2800042, MEM_AP_TAR 0xfb0
Error: AHBAP Cached values: dp_select 0x10, ap_csw 0xa2000002, ap_tar
0x310
Error: SWJ-DP STICKY ERROR
Error: Read MEM_AP_CSW 0x2800042, MEM_AP_TAR 0x310
Error: Target not examined yet
Runtime error, file "lib/openocd//target/omap3530.cfg", line 54:
Error writing @ 0x5401d030: -4
-- cut --
Dirk
---
tcl/target/omap3530.cfg | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
Index: trunk/tcl/target/omap3530.cfg
===================================================================
--- trunk.orig/tcl/target/omap3530.cfg
+++ trunk/tcl/target/omap3530.cfg
@@ -34,7 +34,8 @@ if { [info exists JRC_TAPID ] } {
jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0x3f \
-expected-id $_JRC_TAPID
-jtag configure $_CHIPNAME.jrc -event post-reset "runtest 100"
+jtag configure $_CHIPNAME.jrc -event post-reset \
+ "runtest 100; omap3_dbginit"
# GDB target: Cortex-A8, using DAP
target create omap3.cpu cortex_a8 -chain-position $_CHIPNAME.dap
@@ -42,7 +43,7 @@ target create omap3.cpu cortex_a8 -chain
# FIXME much of this should be in reset event handlers
proc omap3_dbginit { } {
poll off
- reset
+# reset
sleep 100
jtag tapenable omap3530.dap
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