> Clean up some Cortex-M3 reset handling. > > - AIRCR_SYSRESETREQ is generic; use it on any system where > SRST won't fly, not just on Stellaris-based ones. > > - Reformat and improve comments about the Stellaris quirk; and > xref the only public docs (an email) about the issue. > > It seems that *most* Stellaris chips have this problem. Tempest > parts aren't yet in general sampling; and if rev B silicon for > earlier chips exists, it's not very visible yet. > ---
Just for info the statement: "Use a standard Cortex-M3 software reset mechanism" is not correct as the sequence will not work on a stm32. It is implementation dependant, but is the correct sequence for luminary - luminary support helped a lot sorting this problem out. Cheers Spen _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
