I found some time to investigate that problem. Nico Coesel pisze: > At which frequency is your LPC2103 running and which core voltage?
After reset 12MHz and the voltages are standard - 3.3V an 1.8V. After some inits - 72MHz (max). > At higher frequencies the chip may show strange behaviour due to the core > supply voltage dropping too much (NXP has an errata sheet on this). I've checked that, but my revision of LPC2103 doesn't have that bug. Moreover - the code works perfectly in "normal" conditions - that failure is there ONLY when debugging. What actually helped was specifically disabling MAM via GDB after reset. The soft_reset_halt doesn't do that, and that was the problem. I need to add: monitor mww 0xE01FC000 0 to a GDB startup commands and then everything is fine. Do you think that disabling MAM should be added in some way to soft_reset_halt procedure? 4\/3!! _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
