On Friday 26 June 2009, Zach Welch wrote: > Any tips for handling N RTCK signals, other > than my brute force "use part(s) of a 7400 series IC" or plain "simply > don't" approaches?
I found some info in a TI presentation when I was searching for 1149.7 or maybe ICEpick information ... ICEPick has some RTCK smarts, and TI has some VHDL they'll send you. Apply Google... Basically, you want want RTCK(out) to be high only once *all* RTCK(i) input values are high. And then you want it to go low as soon as *any* RTCK(i) input goes low. I think there was some other nuance too; the VHDL probably captures some timing constraints, like minimum high and low times. The "combine N RTCK signals" issue comes up both at chip and board level integration. With a JRC, you've also got to gate each RTCK so that it's not included in the RTCK(out) computation unless it's actually part of the scan chain. - Dave p.s. Yes, most targets should "just work". _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
