So - I guess the next step with OMAP - aka: CortexA8 is to figure out how the DAP interface works. The existing dap code - well - It's a bit confusing to me, and has such wonderful documentation.
======= I'm thinking that adding a "dap" command will be helpful - for both Cortex M3 - and A8. Any objections? Who knows a lot about this dap thing? I'd like to ask a number of questions... what should the command look like? What features/options should it have? ======= Specifically - I'm looking at ARM IHI 0031A - Figure 2-2, page 2-9, PDF page 45. There's this nice diagram that shows the 5 basic registers in the DAP. I think having a command line exploration tool/command would be very helpful. Any agreement? ======= Next, item is figuring out how the DAP is configured in the A8 - and which 'ports' are implemented. on this beast, ie: What access points out of the DAP are implemented. In the M3 - it seems nicely documented This part, I'm a bit confused about. Are you? Anybody else? The diagram (figure 2-2 above for the M3) shows a "SELECT" register... offset 8 in the DPACC range, the output of which becomes the APSEL (access port select). Hence, my idea of having a "dap" command that lets one experiment and figure things out. Ideas/Suggestions? Objections? ===== It seems, that we need to look at address 0xffc - in the "rom table" and work backwards from there, ie: See IHI 0031A - section 1.2.3, And - section 13.2 - the CID0 to CID3 registers... should lets us "walk" the register tables. however, it seems the cortex_swjdp.c - seems to be some what "purpose built" for the M3. Agree? Or am I missing something? ===== My guess the "jtag-acces-port" interface is not one that is implemented, but is documented in IHI 0031A, ie: section 2.2.1 this would be used for things internal that are Jtag type devices - which don't exist. -Duane. _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
