On Mon, Jul 7, 2008 at 8:45 PM, Duane Ellis <[EMAIL PROTECTED]> wrote:

> Earlier I was asking about cortex support.
>
> Spen pointed me here:
>
> spen> openocd contains a few hacks (define ARMV7_GDB_HACKS in
> spen> armv7m.h) that makes mainlinegdb behave better with the
> spen> v7 arch.
>
> In other mail -
>
> SimonQian> I am using IAR EWARM 5.11 with STM32, it
> SimonQian> support OpenOCD. But ARMV7_GDB_HACKS in
> SimonQian> armv7m.h must be disabled. I was told that
> SimonQian> GDB doesn't support Cortex chips.
>
> I see no real reason why this should be a #DEFINE.
>
> I propose:
>
> (a)  a configuration command that lets one enable or disable this.
>
> (b)  The default value should T.B.D.


>
> Suggestions?


Can we avoid an option?

Can we simply hardcode the least of evils and delete hacks once
GDB catches up? (I believe we're waiting for a new and improved GDB
here?).


>
>
>
>
>
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>



-- 
Øyvind Harboe
http://www.zylin.com/zy1000.html
ARM7 ARM9 XScale Cortex
JTAG debugger and flash programmer
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