Earlier I was asking about cortex support.

Spen pointed me here:

spen> openocd contains a few hacks (define ARMV7_GDB_HACKS in 
spen> armv7m.h) that makes mainlinegdb behave better with the
spen> v7 arch.

In other mail - 

SimonQian> I am using IAR EWARM 5.11 with STM32, it 
SimonQian> support OpenOCD. But ARMV7_GDB_HACKS in 
SimonQian> armv7m.h must be disabled. I was told that 
SimonQian> GDB doesn't support Cortex chips.

I see no real reason why this should be a #DEFINE.

I propose:

(a)  a configuration command that lets one enable or disable this.

(b)  The default value should T.B.D.

Suggestions?




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