FWSEC-FRTS is the first firmware we need to run on the GSP falcon in
order to initiate the GSP boot process. Introduce the structure that
describes it.
Signed-off-by: Alexandre Courbot <acour...@nvidia.com>
---
drivers/gpu/nova-core/firmware.rs | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/drivers/gpu/nova-core/firmware.rs
b/drivers/gpu/nova-core/firmware.rs
index
9bad7a86382af7917b3dce7bf3087d0002bd5971..4ef5ba934b9d255635aa9a902e1d3a732d6e5568
100644
--- a/drivers/gpu/nova-core/firmware.rs
+++ b/drivers/gpu/nova-core/firmware.rs
@@ -43,6 +43,34 @@ pub(crate) fn new(
}
}
+/// Structure used to describe some firmwares, notable fwsec-frts.
+#[allow(dead_code)]
+#[repr(C)]
+#[derive(Debug, Clone)]
+pub(crate) struct FalconUCodeDescV3 {
+ pub(crate) hdr: u32,
+ pub(crate) stored_size: u32,
+ pub(crate) pkc_data_offset: u32,
+ pub(crate) interface_offset: u32,
+ pub(crate) imem_phys_base: u32,
+ pub(crate) imem_load_size: u32,
+ pub(crate) imem_virt_base: u32,
+ pub(crate) dmem_phys_base: u32,
+ pub(crate) dmem_load_size: u32,
+ pub(crate) engine_id_mask: u16,
+ pub(crate) ucode_id: u8,
+ pub(crate) signature_count: u8,
+ pub(crate) signature_versions: u16,
+ _reserved: u16,
+}
+
+#[allow(dead_code)]
+impl FalconUCodeDescV3 {
+ pub(crate) fn size(&self) -> usize {
+ ((self.hdr & 0xffff0000) >> 16) as usize
+ }
+}
+
pub(crate) struct ModInfoBuilder<const N: usize>(firmware::ModInfoBuilder<N>);
impl<const N: usize> ModInfoBuilder<N> {
--
2.49.0
