On Aug 20 02:43, Hayes Wang wrote: > Corinna Vinschen [mailto:vinsc...@redhat.com] > > Sent: Thursday, August 20, 2015 3:24 AM > [...] > > + /* > > + * Versions prior to RTL_GIGA_MAC_VER_19 don't support resetting the > > + * tally counters. > > + */ > > + if (tp->mac_version >= RTL_GIGA_MAC_VER_19) { > > + RTL_W32(CounterAddrHigh, 0); > > + RTL_W32(CounterAddrLow, CounterReset); > > I check these with our engineers, and they say the bit 6 ~ 63 should be the > valid 64 byte alignment memory address. Although you don’t want to dump > the counters, the hw may also clear the data in the memory which is indicated > by bit 6 ~ 63, when you reset the counters.
Ok, that's easy enough to implement. What about CmdRxEnb? Are there chips which need this flag set to perform the counter reset? Thanks, Corinna
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