On 9/25/20 5:10 PM, Joakim Zhang wrote: > There is a NOTE at the section "Detection and correction of memory errors": > All FlexCAN memory must be initialized before starting its operation in > order to have the parity bits in memory properly updated. CTRL2[WRMFRZ] > grants write access to all memory positions that require initialization, > ranging from 0x080 to 0xADF and from 0xF28 to 0xFFF when the CAN FD feature > is enabled. The RXMGMASK, RX14MASK, RX15MASK, and RXFGMASK registers need to > be initialized as well. MCR[RFEN] must not be set during memory > initialization. > > Memory range from 0x080 to 0xADF, there are reserved memory (unimplemented > by hardware), these memory can be initialized or not. > > Initialize all FlexCAN memory before accessing them, otherwise, memory > errors may be detected. The internal region cannot be initialized when > the hardware does not support ECC. > > Signed-off-by: Joakim Zhang <qiangqing.zh...@nxp.com>
Is this whole patch valid/compatible with the mx7,too? Marc -- Pengutronix e.K. | Marc Kleine-Budde | Embedded Linux | https://www.pengutronix.de | Vertretung West/Dortmund | Phone: +49-231-2826-924 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
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