Hi,
the thing is , that im not a stmmac developer. Yes , maybe i can bissect it and yes you are lucky since im a C-developer since a long time for embedded systems. The problem is that i dont understand the structure of stmmac and im not aware of any documentation about the driver structure nor the underlying ethernet hardware ( even though im used to ethernet hardware in embedded environment ). So how shall i recognize the relevant change between 4.14.29 and 5.0rc8 ? Is it in the DTS/DTB, wrong hardware description ? Is it in the code ? how is the duplex hardware working on this piece ? I can try to support you the best i can, but i have little chances to analyze it myself. At which measurements / counters is it possible to see that duplex is fully working ? Why did even the non-duplex bandwidth regress from 900MBits to 650 ? Why is that 650 MBits dividing up to TX and RX in summary when doing duplex ? Why is TX not starving in duplex but RX ? >From my point of view should be the following things given: - the non duplex bandwidth should be somewhere around 900MBits , the HW is capable of that - TX should not influence RX or vice versa in duplex - the duplex bandwidth should be 900MBits in both directions ( maybe a bit asymetric when buffers in both dirs are not same ) I guess we need some profiling on stmmac and ( at least i need ) more knowledge of the hardware and stmmac itself. Can someone point me to the driver documentation, describing the functions in the code and the structure ? How can i profile stmmac ( usually im using hardware / JTAG debuggers at work, but here @home i got nothing like that ) So how do we continue ? regards, Simon Am 27.02.2019 um 12:09 schrieb Jose Abreu: > Hi Simon, > > On 2/24/2019 8:34 PM, Simon Huelck wrote: >> the topic is about ODROID C2 / Amlogic S905X since the start. we have a >> performance regression since 4.14. > As we are not advancing in this topic I suggest you try bisecting > the offending commit. > > Thanks, > Jose Miguel Abreu
